Xilinx-FPGA-PCIe-XDMA-Tutorial
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There are 5 lane Err
I am trying the XDMA ip to accomplish the PCIe,but it's "lspci -vvv"give me 5 lane Err as the following. And I can write or read data from the VCU118 card.The speed only have 8GBps,but the Gen3*16 should >14Gbps. Could you give me some help?