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[arch/x86] Intel APX support

Open nullableVoidPtr opened this issue 10 months ago • 6 comments

  • [x] EGPRs
  • [x] JMPABS
  • [x] Push/Pop
    • [x] PUSH2
    • [x] PUSHP
    • [x] POP2
    • [x] POPP
  • [x] CCMPSCC
  • [x] CFCMOVCC
  • [x] CTESTSCC
  • [x] SETCC
  • [x] Zero Upper
    • [x] IMUL
    • [x] SETCC
  • [X] New Data Destination

Resolves #5246

nullableVoidPtr avatar Feb 17 '25 16:02 nullableVoidPtr

@nullableVoidPtr thx for your work! Please let me know when you think the code is ready for reviewer!

xusheng6 avatar Mar 10 '25 03:03 xusheng6

The push / pop lifting looks fine on the binary https://github.com/user-attachments/files/23866882/apxbin.zip

emesare avatar Dec 01 '25 22:12 emesare

image

CCMP also looks correct, the conditional CMP block and the DFV write block look fine.

emesare avatar Dec 01 '25 23:12 emesare

Thanks for the test bin - I'll be sure to test against that; do you have a corpus for the other extension instructions?

nullableVoidPtr avatar Dec 02 '25 07:12 nullableVoidPtr

👏

stong avatar Dec 03 '25 10:12 stong

Thanks for the test bin - I'll be sure to test against that; do you have a corpus for the other extension instructions?

I do not, I will make another with more of the extensions instructions expressed, thank you for responding quick!

emesare avatar Dec 03 '25 17:12 emesare