Vector35
Add support for Intel APX
Intel recently introduced a large extention to the existing x64 ISA, adding registers R16-R31, as well as three operand style instrutions for many arithematic operations, e.g.,
Relevant links:
- https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html
- https://en.wikipedia.org/wiki/X86#APX_(Advanced_Performance_Extensions)
This extension is slated for future CPUs so we are not rushing to add support for it, but we still wish to add it in at a reasonable point.
Note, that I have been working on updating xed to v2024.04.01 (https://github.com/intelxed/xed/releases/tag/v2024.04.01), which already has the support for APX. However, there are various changes needed on my end to actually add support for it, e.g., extending the register list (https://github.com/Vector35/binaryninja-api/blob/dev/arch/x86/arch_x86.cpp#L2930), etc.
I've tried my hand with some untested code - I've had to add EGPRs and JMPABS for a CTF, and I figured I could add the rest. I've made some assumptions about XED operands with NDD and they'll have to be properly tested. I'm not too certain with how ZU should be properly implemented in the IL however.
https://www.phoronix.com/news/Nova-Lake-Does-AVX10.2-APX LLVM now has a novalake target which will have APX.
Test binary: apxbin.zip
Good test function: 0x140001020
