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Published 20 hours ago • verified publisher icon VUnit

why parameter names have to be lower case?

Open nndurj opened this issue 3 years ago • 1 comments

https://github.com/VUnit/vunit/blob/f344c8b5642d7aa13db2e16f6fc7151585ca96d0/vunit/ui/init.py#L380

Why parameters have to be lower case? I think its common in systemverilog to have upper case for parameters.

nndurj avatar Dec 17 '21 10:12 nndurj

I think it's because VHDL is not case sensitive. See #77 and https://github.com/VUnit/vunit/commit/8360eaaba2dc338f7f59d56f6f950650fd9c5d1a. It might be sensible to revisit that fix taking SV into account.

umarcor avatar Jan 08 '22 03:01 umarcor