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Do not add builtins by default

Open umarcor opened this issue 5 years ago • 2 comments

From https://github.com/VUnit/vunit/pull/507#discussion_r328261564:

[@kraigher] This is really an old mistake that I think we made that I might want to change. It would have been better not to add the builtins by default since it makes options easier and also we do not require a separate VUnit class to be used for Verilog.

[@umarcor] Do you mean to remove compile_builtins from from_argv and from_args? That'd be a breaking change, wouldn't it?

umarcor avatar Oct 07 '19 02:10 umarcor

I do not think this is urgent to do. But when we see a reason where this change would make our life easier we should do it. Currently I think we can wait.

kraigher avatar Oct 12 '19 16:10 kraigher

When doing this change we should replace the add_builtins method with an add_vhdl_builtins and add_verilog_builtins method.

kraigher avatar Oct 12 '19 16:10 kraigher