SVE dup instructions do not process Immediate correctly.

[FinnWilkinson]

In the current implementation, the immidiate value for the SVE dup zd, #imm{, shift} instructions is limited to 8-bits. However from the Armv8 ISA specification it states that for vector element widths of 16 bits or higher, the immidiate can be a signed multiple of 256 in the range -32768 to +32512 (excluding 0).

Additionally, the optional LSL is currently not taken into account.