Tommy Murphy

Oh - thanks - missed that too. Sorry about that!

No - a build of the very latest openocd from https://github.com/riscv/riscv-openocd gives the following output for a Cortex-M3 target poll: ``` Open On-Chip Debugger > poll background polling: on TAP:...

This repo is for the RISC-V fork of OpenOCD, where development on RISC-V support is done before being upstreamed to the main OpenOCD project. TPIU is a feature of the...

> RISCV Nexus and ARM TPIU tracing are very similar, also the connectors are sharing same pins. I still don't understand. Perhaps the information conveyed by the two trace mechanisms...

@ilg-ul is referring to the _Debugger_ tab in the debug launch configuration GUI. https://rtist.hcldoc.com/help/index.jsp?topic=%2Forg.eclipse.cdt.doc.user%2Fgetting_started%2Fcdt_w_debug.htm

> ### Description > Setting a break point on Reset_Handler seems to stall at fpu init and not going to main using Jlink with cortex m7, however if I specify...

You haven't explained important details about your program that I asked about. Flash Vs RAM memory layout, relocation/copying, startup code etc. Without detailed info we're all just guessing. E.g. why...

> > > the debugger seems to stall in the fpu init > > > > > > What does this mean? Did you single step the assembly code? >...

Just to recap, things that I would look at: 1. If the program is being programmed to flash before debugging then remove the load of the program to the target...

> Do you mean in here?  Yes. If the program is already in flash and being run/debugged from there then the debugger should not be trying to load it...