DRT: choosing a better location for stacking vias that reach BTerm above TOP_ROUTING_LAYER

[openroad-robot]

Previously, we used to choose the center point of the pin as the location of the stacked vias that goes from the Pin down to the TOP_ROUTING_LAYER. In one of the cases, where RightWayOnGridOnly rule is enforced, the center pt is unreachable if it is not on track. In this PR:

• Choose a location where there exists a track on the TOP_ROUTING_LAYER and that is closest to the pin's center
• Move processBTermsAboveRoutingLayer to io::Parser::readDesign since it now needs the track patterns info.
• Minor changes to accomodate the new structure.
  • design_ -> getDesign()
  • tech_ -> getTech()

[github-actions[bot]]

clang-tidy review says "All clean, LGTM! :+1:"

[maliberty]

Move processBTermsAboveRoutingLayer to io::Parser::readDesign since it now needs the track patterns info.

I don't see why this is necessary. We copy the track patterns to the frBlock so they are still accessible after io is done.

[osamahammad21]

the frBlock so they are still accessible

What we used to do as initialization:

• Read Tech (which does not include the track patterns)
• ProcessBTermsAboveTopLayer
  • This is a workaround made by DRT to handle BTerms above top layer. It creates a stack of via reaching from the pin till the top layer and adds it to the net wire. It uses the center of the pin as the via stack location.
• Read design (including bterms)
  • We read the BTerms. If a pin is above the top routing layer, we get the stack of vias added previously by processBTermsAboveTopLayer to add them as part of the pin shape.

Since now we need the track patterns in processBTermsAboveTopLayer, then it has to be called after setTracks called in readDesign.

[github-actions[bot]]

clang-tidy review says "All clean, LGTM! :+1:"

[osamahammad21]

@maliberty Could you review please?

[github-actions[bot]]

clang-tidy review says "All clean, LGTM! :+1:"

[maliberty]

merge at will