CTS-Avoid level balance buffers overlap.
The current Level Balancer of CTS tends to insert buffers one on top of the other and when they are legalized a cluster of buffers is formed, issue #2305 shows an example of this. This happens specially if the clock buffers are large and it creates a high congested area that can lead to the global router finishing with overflow.
This PR changes the level balancer to avoid overlapping the inserted buffers and preventing the creation of the clusters of buffers. The next images show the result for the regressions test of CTS balance_levels:
Current:
New:
clang-tidy review says "All clean, LGTM! :+1:"
clang-tidy review says "All clean, LGTM! :+1:"
clang-tidy review says "All clean, LGTM! :+1:"
secure ci?
Secure Ci is passing, only need to update a antenna diode count metric for 1 design. I am going to create a PR for this update.
clang-tidy review says "All clean, LGTM! :+1:"
Close as balance levels is now obsolete.