Add the option to document the Instantiations part with tha assignations.

[DRubioG]

I think I could be very interesting to change the part 'Instantiations' in Module Documentation to put a table with the assignations and a description about the assignations did it.

[gmartina]

@DRubioG Please provide an example.

[DRubioG]

For example, with this instantation:

Get a table like this:

Markdown code:

|  Port  | Conection | Type | Description |
|--------|-----------|------|-------|
| clk    | clk_i     | std_logic | clock assignation |
| rst_n  | rst_n_i   | std_logic | reset connection, low level activate |
| output | s_counter_aux | std_logic_vector(7 downto 0) | this port is assigned to the counter of the PWM |

Other option is to expand this table to get a more information:

Markdown code:

|  Port map  | Conection | Type | Conection type | Direction | Description |
|--------|-----------|------|---|---|-|
| clk    | clk_i     | std_logic | signal | In | clock assignation |
| rst_n  | rst_n_i   | std_logic | port | In|reset connection, low level activate |
| output | s_counter_aux | std_logic_vector(7 downto 0) | signal | Out | this port is assigned to the counter of the PWM |