Indentation following vhdl 'when' clause

[SittingDuc]

Describe the bug After entering a when clause in my vhdl file, and hitting enter, I find the next line is indented one step too far (as if I was entering a multi-line when / with $foo select construct, rather than a completed one with the semicolon)

To Reproduce paste the demo code into Codium and navigate to line 9 / comment "step 3", hit enter at the end and observe the indent level is as shown in "step 4", not as shown in "step 5".

Code

-- indentation demonstration

architecture demo of indentme is
begin

    q1 <= d1; -- step 1. hit enter here >
    -- step 2. indent lands here. Perfect

    q2 <= data1 when sel = '1' else data0; -- step 3. hit enter here >
        -- step 4. indent lands here
    -- step 5. but I expect indent to land here

end architecture demo;

Please complete the following information:

• OS: Ubuntu 22.04.
• VSCode version: Codium 1.75.1 x64 "c6a9727b801542499d2b59cb7db4224e060fc578"
• TerosHDL version: 6.0.6
• vhdl_ls version 0.83.0

Codium is sourced from apt, which makes it slightly out-of-date. TerosHDL is updated from the extension browser, not by sideloading from git, and vhdl_ls is not sideloaded either. I believe I have also seen this behaviour on TerosHDL v5.0.11 on a different Ubuntu machine previously.

Additional context I'm not sure if this one 'belongs' to TerosHDL or to the VHDL_LS; if the latter, I am happy to go open a bug report on their github and point this one at it

[SittingDuc]

fixed apt to include a PPA and grabbed Codium 1.93.1 x86 "dbab3f8e8c5da7ca1bde636806e0a973e497aa01".

(aside: the vhdl_ls is now reporting syntax errors like my other machine does (for example, the demo code above has no entity, which Codium 1.93.1 reports but 1.75.1 did not). So I am much happier overall)

But the issue here still manifests. Ubuntu 22.04.5, Codium 1.93.1 (PPA), TerosHDL 6.0.6 (not sideloaded), vhdl_ls 0.83.0 (not sideloaded)

Okay, final test for tonight. vhdl_ls 0.83.0 is the latest on github, so no point sideloading it. Grabbed 2024-09-29__11_50_teroshdl-6.0.9.vsix off github and "Installed from vsix" it, restarted Codium, and my test code from the original issue still manifests.

Ubuntu 22.04.5, Codium 1.93.1 (PPA), TerosHDL 6.0.9 (sideloaded vsix), vhdl_ls 0.83.0 (not sideloaded)

[SittingDuc]

Learning how to "language server" in vscode world and I see https://github.com/VHDL-LS/rust_hdl_vscode/blob/29996a4d9f4bf0c68e638ef2f57f9e57b95aa08e/language-configuration.json#L21 marks "else" as a reason to indent using vscode in-built indenting rules; which works fine for if then else end if blocks, but may be tripping up with select and when blocks.

So I suspect my efforts belongs to the VHDL-LS code, either rust_hdl_vscode or rust_hdl project. I will leave this issue open here for now and go apply myself over there to see how to bring this to a conclusion..

[SittingDuc]

okay, revise that. Chasing further I find back in this project https://github.com/TerosTechnology/vscode-terosHDL/blob/b54d1b9ee5f11f8ee0629657e1ec38ac09d7ab46/configs/vhdl.configuration.json#L30 sets the rules for indenting, If I change it to

"increaseIndentPattern": "^((?!(--|/\\*)).)*(\\b(begin|loop|generate|then)\\b|\\b(component|block|process|is|generic|port|else)\\b[^;]*$)",

as a horrible, horrible hack, then my issue is resolved.

Specifically I have moved else from the always-indent group, to the only-indent-if-no-; group, as noted in the comments on the lines trailing.

This probably isn't elegant enough to solve the issue for everyone, and I bet I missed a corner case or three, but the hack seems to work for me...