StellaCassandra

dtm_t vs tsi_t: Multicore / multiple hart support missing for tsi_t

1

Rocketchip (@680f3b162047c1ac36390dcdf682815fc0b24ffe) configuration: DualCoreConfig (default, unmodified) On spike -p2, a bare-metal program is executed by both harts simultaneously. The rocket-chip emulator (Verilator) uses the dtm_t interface for emulation. Executing a...