VexRiscv
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Support User Interrupts / Exceptions SEDELEG/SIDELEG
It would be nice to be able to delegate interrupts to happen in user mode. This should be as simple as setting a bit in the SIDELEG register, which would cause interrupts to immediately be handled inside user mode.
+ utvec + uepc + ucause + utval :) But all of that is only copy past from the M / S modes, so nothing complicated