SpinalDoc-RTD

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Readon

Adding QFormat initialization

mrberman87

Add doc about SVIF (system verilog interface)

2

for this pr: https://github.com/SpinalHDL/SpinalHDL/pull/1364

yportne13

Add Plru Docs

5

MahirAbbas

sync with https://github.com/SpinalHDL/SpinalHDL/pull/1305

Dolu1990

TaggedUnion documentation

1

Do not merge until SpinalHDL/SpinalHDL#1241 has not been merged. A first try at documenting the new TaggedUnion data type.

ronan-lashermes

Do not merge until SpinalHDL/SpinalHDL#1079 has not been merged. Due to SpinalHDL/SpinalHDL#1079 submission, a new application API method has been generated. ```scala import spinal.lib.tools.HDElkDiagramGen HDElkDiagramGen(SpinalVerilog(new _)) ``` This function will...

ZhaokunHu

Section for `How SpinalHDL simulates the hardware with Xilinx XSim backend` is missing.

dlmiles

Sequential logic/memory: matters arising from docs with annotations/blackbox/memory/device complexities

2

This started as a comment to Tranche 3 but requires more investigation to help clarify both the code/mechanisms and the documentation around it. So to track I open this. ---...

dlmiles

Introduction/A simple example: updated (REVIEW/ADD DETAIL)

2

Browsable preview at: https://dlmiles.github.io/SpinalDoc-RTD/docs_multi/html/vTEST/index.html https://dlmiles.github.io/SpinalDoc-RTD/docs_multi/html/vTEST/SpinalHDL/Introduction/A%20simple%20example.html# See review marker looking for assistance to reword this area. Thanks

dlmiles