Jie Liu

Modulo operation fails on operands greater than 128-bit in LLVM backend

4

When using the LLVM backend, modulo operation `%` fails with integers longer than 128 bit. The test case is linked here: ```python import heterocl as hcl import numpy as np...

Memory dependencies are common in various applications. One example I encountered is: ```python import heterocl as hcl import numpy as np N_HASH_FUNC = 5 HASH_RANGE = 10 PACKET_SIZE = 10...

An extendable and elegant device target interface embracing both FPGA and ASIC

3

For FPGA, there's a host and a device code. The programmers can write HeteroFlow code in the following style: ```python target = hcl.platform.aws_f1 s = hcl.create_schedule([in_list], kernel) s.to(input, target.xcel, mode)...

Redundancy in generated vhls code

2

There are some redundant code in HeteroCL generated vhls code. The test case is: ```python def test_redundancy(dtype=hcl.Int()): hcl.init(dtype) A = hcl.placeholder((2, 3), "A") B = hcl.placeholder((3, 5), "B") C =...