Serena Curzel
Serena Curzel
Hi, I noticed a potential bug/corner case when using ap_fixed types with low precision. The default table_size for activation functions is 1024, so in [this line](https://github.com/fastmachinelearning/hls4ml/blob/0f35cbbc6e051fc32fc830c7959e936c08058aab/hls4ml/templates/vivado/nnet_utils/nnet_activation.h#L189) N will be 10,...
`bambu test_issue.c --top-fname=test_function --simulate --generate-tb=test.xml --compiler=I386_CLANG10 -v4` -> synthesis and simulation work fine `bambu test_issue.c --top-fname=test_function --simulate --generate-tb=test.xml --compiler=I386_CLANG12 -v4` -> testbench generation fails with the following error: ``` C-based...
I have more than one kernel failing simulation at the moment, but in the archive I isolated a small-ish example. The files to reproduce the error are attached in [durbin.zip](https://github.com/ferrandi/PandA-bambu/files/8498877/durbin.zip),...
Hi, in [environment.yaml](https://github.com/hls-fpga-machine-learning/hls4ml-tutorial/blob/master/environment.yml) Tensorflow version 2.3.1 is required. However when I run the notebooks on jupiter hub this happens: ``` print(tf.__version__) 2.1.0 ``` This is the cause of a weird...
As far as I understand, the [config.json](https://github.com/hanchenye/scalehls/blob/master/samples/polybench/config.json) file has information about the target FPGA (number of DSPs etc) that are used by scaleHLS to optimize kernels. What is the target...
To move forward after HLS with logic synthesis, vivado HLS needs to export the design as a Xilinx IP. I was trying to synthesize an atax kernel from Polybench, and...
I have a couple of very small polybench kernels that cause scaleHLS to crash with the following error: ``` scalehls-opt: scalehls/polygeist/llvm-project/mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp:464: mlir::LogicalResult performPreTilingChecks(MutableArrayRef, ArrayRef) [t = unsigned int]: Assertion `input.size()...
Hi, I was playing around to synthesize syrk and syr2k kernels with scaleHLS, and I discovered that the [test_syrk.c](https://github.com/hanchenye/scalehls/blob/master/samples/polybench/syrk/test_syrk.c) and [test_syr2k.c](https://github.com/hanchenye/scalehls/blob/master/samples/polybench/syr2k/test_syr2k.c) files contain a different implementation that the one of...
Hi, is this repo still maintained? I think it is extremely useful, and I was able to adapt it for my Quartus 21.1 installation. However, I am having issues related...
Hello, looking at the [supported operators list](https://github.com/onnx/onnx-mlir/blob/main/docs/SupportedONNXOps-cpu.md), it seems that it should be possible to run onnx-mlir on a model containing DequantizeLinear/QuantizeLinear ops. However, when I try to do it...