embedded-common [FIX] Bug fixed on SAMDR architecture of I2C

Hi, i am working on a ATSAMDR34J18, i see that on the SAMD architecture and the ASF the code wrote on the repo isnt working.

Its just an small bug because we dont wait for the I2C to return an OK status, so we never know if the packet was send sucesfully.

As you can see, we just need to add a Timeout and a while(Not confirmed by the I2C driver that the packet was send succesfully)

Read case

int8_t sensirion_i2c_read(uint8_t address, uint8_t* data, uint16_t count) {
     uint16_t timeout = 0;
	 
	 
	    struct i2c_master_packet packet = {
		    .address = address,
		    .data_length = count,
		    .data = (uint8_t*)data,
		    .ten_bit_address = false,
		    .high_speed = false,
			.hs_master_code  = 0x0,
	    };
		
	    
		    while (i2c_master_read_packet_wait(&i2c_master_instance, &packet) !=
		    STATUS_OK) {
			    /* Increment timeout counter and check if timed out. */
			    if (timeout++ == TIMEOUT) {
					return -1;
				    break;
			    }
		    }
			
		return 0;


		

}

Write case

int8_t sensirion_i2c_write(uint8_t address, const uint8_t* data,
                           uint16_t count) {
	uint16_t timeout = 0;
    struct i2c_master_packet packet = {
	    .address = address,
	    .data_length = count,
	    .data = (uint8_t*)data,
	    .ten_bit_address = false,
	    .high_speed = false,
    };
	    while (i2c_master_write_packet_wait(&i2c_master_instance, &packet) !=
	    STATUS_OK) {
		    /* Increment timeout counter and check if timed out. */
		    if (timeout++ == TIMEOUT) {
			    break;
				return -1;
		    }
	    }


    return 0;
}

And here its the result on the Saleae Logic Analyzer.

imagen