《配置 RISC-V 合规性测试》出错

[linbaiwpi]

你好，我在运行riscof的时候遇到以下错误，不太知道怎么解决，请求帮助，verilog/verilator/obj_dir/VTop确认已经生成，但是../../../../../../../verilog/verilator/obj_dir/VTop似乎跳到yetcpu以外了

root@c8f19f5a3dca:/home/xxxx/yatcpu/riscof-target# riscof --verbose info run --config ./config.ini --no-browser --suite /home/xxxx/yatcpu/riscv-isa-sim/build/riscv-arch-test/riscv-test-suite/rv32i_m --env /home/xxxx/yatcpu/riscv-isa-sim/build/riscv-arch-test/riscv-test-suite/env
    INFO | ****** RISCOF: RISC-V Architectural Test Framework 1.25.3 *******
    INFO | using riscv_isac version : 0.18.0
    INFO | using riscv_config version : 3.18.3
    INFO | Reading configuration from: /home/xxxx/yatcpu/riscof-target/config.ini
    INFO | Preparing Models
    INFO | Input-ISA file
    INFO | ISACheck: Loading input file: /home/xxxx/yatcpu/riscof-target/yatcpu/yatcpu_isa.yaml
    INFO | ISACheck: Load Schema /usr/local/lib/python3.10/dist-packages/riscv_config/schemas/schema_isa.yaml
    INFO | ISACheck: Processing Hart:0
    INFO | ISACheck: Initiating Validation for Hart:0
    INFO | ISACheck: No errors for Hart:0
    INFO | ISACheck:  Updating fields node for each CSR in Hart:0
    INFO | ISACheck: Dumping out Normalized Checked YAML: /home/xxxx/yatcpu/riscof-target/riscof_work/yatcpu_isa_checked.yaml
    INFO | Input-Platform file
    INFO | Loading input file: /home/xxxx/yatcpu/riscof-target/yatcpu/yatcpu_platform.yaml
    INFO | Load Schema /usr/local/lib/python3.10/dist-packages/riscv_config/schemas/schema_platform.yaml
    INFO | Initiating Validation
    INFO | No Syntax errors in Input Platform Yaml. :)
    INFO | Dumping out Normalized Checked YAML: /home/xxxx/yatcpu/riscof-target/riscof_work/yatcpu_platform_checked.yaml
    INFO | Generating database for suite: /home/xxxx/yatcpu/riscv-isa-sim/build/riscv-arch-test/riscv-test-suite/rv32i_m
    INFO | Database File Generated: /home/xxxx/yatcpu/riscof-target/riscof_work/database.yaml
    INFO | Env path set to/home/xxxx/yatcpu/riscv-isa-sim/build/riscv-arch-test/riscv-test-suite/env
    INFO | Running Build for DUT
    INFO | Running Build for Reference
    INFO | Selecting Tests.
    INFO | Running Tests on DUT.
   ERROR | /bin/sh: 1: ../../../../../../../verilog/verilator/obj_dir/VTop: not found
make: *** [/home/xxxx/yatcpu/riscof-target/riscof_work/Makefile.DUT-yatcpu:5: TARGET0] Error 127
    INFO | Running Tests on Reference Model.
    INFO | Initiating signature checking.
   ERROR | Signature file : /home/xxxx/yatcpu/riscof-target/riscof_work/I/src/add-01.S/dut/DUT-yatcpu.signature does not exist