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FDCAN bit timings incorrectly calculated

Open maxschommer opened this issue 8 months ago • 2 comments

In the following section the FDCAN settings are laid out and a nominal and data rates of 500kbps and 2Mbps are calculated.

https://github.com/STMicroelectronics/stm32-mw-openbl/blob/7689c2de09d3e107923bb2c5971eb09d9299a76e/Interfaces/Patterns/FDCAN/fdcan_interface.c#L54

I plugged in those settings into CubeIDE for the H523, and got 250kpbs and 1Mbps calculated. I'm biased to trust the CubeIDE calculation because it agrees with the AN2606 Table 115 which lists FDCAN settings as 250kbps and 1Mbps.

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maxschommer avatar May 08 '25 21:05 maxschommer

Hi @maxschommer,

This is a typo in the comment of the template.

The values are like the ones described in AN2606:

  • 250kbps for connection phase
  • 1Mbps for data phase

Best regards, Aymen.

ALAASTM avatar May 12 '25 15:05 ALAASTM

ST Internal Reference: 209567

KRASTM avatar May 13 '25 08:05 KRASTM

Hello @maxschommer,

the fix has been included in release v6.1.2.

With regards,

KRASTM avatar Dec 30 '25 15:12 KRASTM