STM32H7B3I-DK PLL3 VCO output exceeds 560MHz limit

Open sirius506 opened this issue 2 years ago • 3 comments

STM32H7B3I-BK BSP LCD driver sets PLL3 VCO output to 800MHz. I know it works, but Data sheet says maximum value is 560MHz.

https://github.com/STMicroelectronics/STM32CubeH7/blob/91d4c89228e766a968f8daebc78eb7143d95184e/Drivers/BSP/STM32H7B3I-DK/stm32h7b3i_discovery_lcd.c#L437-L450

Sep 10 '23 06:09 sirius506

Hello @sirius506,

Sorry for the delayed response. Could you please send me the document in which you find this information?

With regards,

Mar 07 '24 17:03 TOUNSTM

Please refer STM32H7B3I datasheet Table 55 on page 112. It says PLL VCO output max freq is 560MHz.

You can also try to set above listed PLL3 settings on the CubeMX clock config screen, then you'll see it responds with error indication (DIVN3 = 200 is too big).

Mar 08 '24 05:03 sirius506

ST Internal Reference: 177140

Mar 27 '24 09:03 TOUNSTM