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Ravenslofty
The Critical Path - a rambly FPGA blog
# Keep Calm and Carry On > Wow, it's been a while since I last wrote a blog article. Sorry about that. > Credit where credit is due: I learned...
# A Constructive Look At Pilkington's TS1 FPGA > In case somebody hasn't read [A Constructive Look At TempleOS](http://www.codersnotes.com/notes/a-constructive-look-at-templeos/) I really think you should. Did you know that Pilkington -...
My general goal for this blog is for fairly well-edited technical writing. This particular post isn't it - it's actually quite depressing - and you're welcome to ignore it if...
# LUT Mapping with Priority Cuts There's a disproportionately low number of people who know how to write a LUT mapper to people who depend on them for a living....
# LUT Mapping with Priority Cuts (II) > Some snippets are going to be in `diff` format, because I find that helps show the changes more. On the other hand,...
# FPGAs Are Magic II ## More boilerplate (but we're getting somewhere!) The goal of *this* post is the FPGA-flow related boilerplate, as opposed to the ASIC-flow related boilerplate of...
# FPGAs Are Magic I > Any sufficiently advanced technology is indistinguishable from magic. > - Arthur C. Clark FPGAs are *magic*. On my Twitter account, I have been posting...
more nextpnr-mistral things! --- I've talked about the LABsLogic Array Blocks a little bit before; they contain 10 ALMsAdaptive Logic Modules each, and are essentially the heart of the Intel...
this is a rough post on what I've tried doing to improve the performance of `nextpnr-mistral` on a specific benchmark: CoreScore. it might end up becoming a series, depending on...
so, I spent all night on this bug, and fedi thinks that a write-up of that might be useful for other people. --- ### the symptoms going into this, all...