Rander Wang

@plbossart @ujfalusi updated (1) remove loop to get llp (2) rework spcm structure definition (3) refine memory window reading (4) split the timestamp commit into small ones

@plbossart Add delay info in topology. https://github.com/thesofproject/sof/pull/6180

@plbossart I am struggling with pipeline latency calculation. In my opinion, pipeline latency is the input pointer - output pointer. In fw, it gets input pointer from the entry module...

> @RanderWang for playback the input pointer is DPIB, and the output pointer the LLP reported in firmware windows. > > I don't understand what the issue is? yes, I...

> @RanderWang for playback the input pointer is DPIB, and the output pointer the LLP reported in firmware windows. > > I don't understand what the issue is? Another issue...

> > > > @RanderWang for playback the input pointer is DPIB, and the output pointer the LLP reported in firmware windows. > > > I don't understand what the...

> > > what I meant is increase the buffering on the copier host, and use the topology to specify that buffer size/duration. > > > > > > sure....

> For your internal tests, you could increase the copier host buffer size _today_, right? > yes, I can, with the buffer size change we can get the different delay...

@plbossart , my test result is: S16LE 2CH host copier dma buffer setting changes (1) dma buffer size = 384 (96 samples) delay = 3xx, (2) dma_buffer size = 768（192...

@plbossart I will add D0ix change after this PR merged