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[GD32_ARM] Fix bugs in drv_adc when enable multiple channel.
拉取/合并请求描述:(PR description)
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Test on GD32F303为什么提交这份PR (why to submit this PR)
ADC driver of GD32_ARM have multiple bugs.
- ADC should use single operation mode, but current version use discontinuous operation mode.
- When calibration is used after turning on the ADC, it is necessary to wait for 14 CK_ADC(about 350ns in GD32F303).
- When enabling multiple ADC channels at once and sequentially reading the different channels, the values read are all the same.
你的解决方案是什么 (what is your solution)
- Make sure ADC enable single operation mode.
- Add a 1us dely after ADCON.
- Clear EOC flag before start ADC convert to prevent other bugs.
- The setting of the regular channel should be done at each reading, rather than at the point of enabling.
请提供验证的bsp和config (provide the config and bsp)
- BSP:GD32/ARM
- .config:
- action:
]
当前拉取/合并请求的状态 Intent for your PR
必须选择一项 Choose one (Mandatory):
- [ ] 本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
- [ ] 本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo
代码质量 Code Quality:
我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:
- [ ] 已经仔细查看过代码改动的对比 Already check the difference between PR and old code
- [ ] 代码风格正确,包括缩进空格,命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
- [ ] 没有垃圾代码,代码尽量精简,不包含
#if 0
代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up - [ ] 所有变更均有原因及合理的,并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
- [ ] 对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
- [ ] 代码是高质量的 Code in this PR is of high quality
- [ ] 已经使用formatting 等源码格式化工具确保格式符合RT-Thread代码规范 This PR complies with RT-Thread code specification
请签署CLA
昨天测了GD32F427发现还有问题,F1~F3应该差不多了,还得改一下。
可以合并请告知
看到有格式错误修了,加了下超时机制。 已在GD32F427ZGT6和GD32F303VET6验证最后版本。我需要修改的都清了,可以合并了。
@Blues-Jiang 搞一个gd32-arm通用的drv_common.c吧