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STM32 UART: trigger on TX register empty, not TX complete

Open smurfix opened this issue 2 years ago • 4 comments

Contribution description

The STM32 serial driver uses an interrupt-controlled transmitter which triggers on TCIE "TX complete", i.e. the transmitter has completed sending the stop bits and is idle.

This introduces unnecessary delay and slows down high-speed output. The correct interrupt to use is TXEIE "TX register is empty", i.e. the transmitter has read from the TX register and started sending a byte, thus the TX register is free to buffer the next byte.

Testing procedure

I have built the Blink example for BOARD=bluepill and confirmed that it (a) does use the tx buffer, (b) still works, (c) has lower delay between bytes (if the baud rate is high enough for that to be noticeable on the 'scope).

smurfix avatar Mar 17 '22 17:03 smurfix

The reasoning makes sense, but somehow tests/periph_uart_nonblocking is consistently taking 51 µs longer on nucleo-l031k6 with this patch.

benpicco avatar Mar 17 '22 22:03 benpicco

Huh. That's strange. I'll investigate.

smurfix avatar Mar 18 '22 07:03 smurfix

The reasoning makes sense, but somehow tests/periph_uart_nonblocking is consistently taking 51 µs longer on nucleo-l031k6 with this patch.

Are you sure about that? because on my bluepill that test consistently takes 47 µs longer without this patch.

smurfix avatar Mar 18 '22 07:03 smurfix

This issue has been automatically marked as stale because it has not had recent activity. It will be closed if no further activity occurs. If you want me to ignore this issue, please mark it with the "State: don't stale" label. Thank you for your contributions.

stale[bot] avatar Sep 21 '22 05:09 stale[bot]

Hm there is no consistency across families:

nucleo-l031k6

before

2103826 µs
2103827 µs
2103826 µs

after

2103866 µs
2103878 µs
2103878 µs

-> +48 µs

nucleo-f722ze

before

2101162 µs
2101161 µs
2101161 µs

after

2101121 µs
2101124 µs
2101122 µs

-> -39 µs

benpicco avatar Oct 12 '22 23:10 benpicco