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Parser error when no newline at end of file

Open sjalloq opened this issue 4 years ago • 1 comments

It looks like the parser can't handle the final line of the module not having a newline. I'm getting parse errors such as:

Syntax error
ERROR:VerilogModule::_ast: :125: before: / while parsing /some/path/to/verilog.v
endmodule   //modulename<nonewline>

sjalloq avatar Jun 30 '20 12:06 sjalloq

Thanks! I can remove this bug by adding empty line to the imported text inside.

shtaxxx avatar Nov 14 '20 08:11 shtaxxx