Pyverilog
Pyverilog copied to clipboard
It fails to parse two-dimensional array
Hi,
My p_sram.v and my python file are as attached files and the version of verilog code parser is 1.1.1.
attached.zip
After parsing the p_sram.v, it shows out the below error. I think it parser does not support the two-dimensional array like reg [7:0] test_r [127:0][63:0]. Would you please reproduce my case?
Thank you
-----------error------------------------------------
Generating LALR tables
WARNING: 160 shift/reduce conflicts
Syntax error
Traceback (most recent call last):
File "./gen_sram.py", line 164, in
I have the same issue.
In my case logic [3:0][3:0] Data
produces the same error
I'm hitting this with a multi-dimensional parameter of the form:
localparam [10:0] CORE_DATA_WIDTH [NUM_CORES-1:0] = '{256, 256};
I want to create an array like
reg [31:0] array [0:15]
so which pyverilog function should i use as there is no function for array. vast._____()