PanRe
PanRe
Can you somehow measure the CPU load? If it is very high the mcu might Hang in some buggy loop, if the load is low there might be a missing...
Can you profile how long the write functions for loading the data into the buffers last?On 3/15/22, 21:41 kaspernyhus ***@***.***> wrote: I have been digging around in the dcd_esp32sx.c file...
Could you monitor the corresponding interrupt enable registers sucht that you can say if it gets disabled at some point? Maybe by placing a breakpoint which hits when the register...
Look info the device controler driver file tinyusb/src/portable/espressif/esp32sx/dcd_esp32sx.c. The registers are set within dcd_edpt_open().Check if the registers are correctly set for the ISO endpoint!On 3/21/22, 06:38 LiTongXue98 ***@***.***> wrote: I'm...
Well, according to the [manual ](https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf) on page 602, the interrupt for the IN EP is always set (bit 18). Unfortunately, the manual does not tell the meaning of the...
> when the 2ms delay starts USB0.in_ep_reg[1].diepint is oscillating between 0x80/0x81 - what does that mean?? I guess the interrupt flag is not cleared. The error may be in the...
In fact we completely forgot this point last time we discussed about the reverted FIFO allocation in dcd_synopsis! We only had IN EPs or the TX part in mind... I...
I had an idea how to solve this issue! Not an overall solution but a step closer to it. If we would allocate all TX FIFOs not starting directly behind...
The problem occurs if you want to open an OUT-EP bigger than the standard size of the RX FIFO. This can occur easily since maximum ISO size is 1023 byte...
Maybe it is not the best approach to skip closing EPs for ISO stuff completely! This would prevent users to reduce the required EP size (by reducing the sample rate...