fatal: not a git repository: chisel3/../../.git/modules/rocket-chip/modules/chisel3

[abignail]

当我make verilog的时候，最后会出现这个问题。算是成功了么 Done elaborating. xiangshan.backend.MemBlock@3c7e4d01 ./scripts/vlsi_mem_gen build/XSTop.v.conf --tsmc28 --output_file build/tsmc28_sram.v > build/tsmc28_sram.v.conf ./scripts/vlsi_mem_gen build/XSTop.v.conf --output_file build/sim_sram.v

sed -i -e 's/(aw|ar|w|r|b)(|bits_)/_\1/g' build/XSTop.v

fatal: not a git repository: chisel3/../../.git/modules/rocket-chip/modules/chisel3 fatal: 'git status --porcelain=2' failed in submodule rocket-chip Makefile:48: recipe for target 'build/XSTop.v' failed make: *** [build/XSTop.v] Error 128

[poemonsense]

我没有在我们的机器上复现出来。请提供更多信息