XiangShan
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Enquiry about Synthesis or even Layout flow/scripts
Hi, thanks a lot for your great work. I heard that your tape-out is very successful, congrats! My question is, besides RTL generation, have you open-sourced any logic synthesis (DC/Genus/etc.) or layout (ICC2/Innovus/etc.) flow for the chip implementation? Seems it's not included in document yet?
Will share it later
These resources can not be shared due to license issue.