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support generate checkpoint to flash file and memory file, and support restore from these files

Open xyyy1420 opened this issue 11 months ago • 9 comments

  • Submodule
    • add protobuf
  • take cpt to flash
    • support for generating checkpoints to flash, thus avoiding the need to link payloads with libcheckpointAlpha.
    • two files will be generated, a flash image and a memory image
    • support difftest from flash
    • change the restore option to specify a flash image, since both checkpoint images and binary are essentially memory mirrors
  • difftest
    • support override ref model pmp and pmpcfg regs
    • support override ref model flash contents
    • tried to fix difftest attach but failed, because of spike has many non-register states which are hard to fix
  • CI
    • because protobuf is added, submodule is initialized by default in CI
    • add take cpt with flash and restore cpt with flash
    • migrating nutshell-spike-ref from local to ready-to-run
  • config file
    • fix the address setting in NEMU riscv64-nutshell-diff-spike_defconfig according to the flash address set in spike.
    • add two configuration files for generating checkpoints to be placed in flash
  • MMIO
    • add three flags to indicate which operations need to skip difftest ref model

xyyy1420 avatar Dec 10 '24 09:12 xyyy1420

load gcpt to flash need position-indenpendent code https://github.com/OpenXiangShan/LibCheckpointAlpha/pull/6

xyyy1420 avatar Dec 10 '24 09:12 xyyy1420

https://github.com/OpenXiangShan/riscv-isa-sim/pull/70 this pr fixes the difftest after checkpoint restore

xyyy1420 avatar Dec 16 '24 10:12 xyyy1420

https://github.com/OpenXiangShan/ready-to-run/pull/78 Bump spike ref in ready-to-run

xyyy1420 avatar Dec 19 '24 07:12 xyyy1420

https://github.com/OpenXiangShan/ready-to-run/pull/79 add nutshell spike so to ready-to-run

xyyy1420 avatar Dec 19 '24 09:12 xyyy1420

https://github.com/OpenXiangShan/riscv-isa-sim/pull/71 support force override vtype

xyyy1420 avatar Dec 20 '24 09:12 xyyy1420

https://github.com/OpenXiangShan/ready-to-run/pull/80 bump spike ref in ready-to-run

xyyy1420 avatar Dec 20 '24 10:12 xyyy1420

https://github.com/OpenXiangShan/riscv-isa-sim/pull/75 support override spike flash

xyyy1420 avatar Dec 25 '24 06:12 xyyy1420

It is difficult for me to review such a large PR. Is it possible to split it into multiple smaller PRs?

Okay, I'm going to split it and request a review again.

xyyy1420 avatar Dec 26 '24 08:12 xyyy1420

I agree with great Poemonsense. It's better to split this large PR into smaller ones.

cebarobot avatar Dec 26 '24 08:12 cebarobot