Nic30
Nic30
The hdlConvertor rules for parsing of the comments are following. * All comments directly before current object are interpreted as a doc of an object * The comments after an...
Chisel3 compatibility layer, simple format. [Grammar available](https://github.com/freechipsproject/firrtl/blob/master/src/main/antlr4/FIRRTL.g4)
It was originally supposed to be a part of #123 but due insufficient time I extracted it as a separate tasks. * notebook which will show how specific object are...
* The goal is to be able open notebooks instantly without the wait for image build.
Currently `line` directive is used only by preprocessor. Preprocessor builds a large string from all the input files and this string is an input of the parser. Problem is that...
https://github.com/Nic30/sv-tests, cosmetic things does remain, but there is always bigger issue.
According to https://github.com/SymbiFlow/sv-tests the `begin_keywords` directive and `line`directive are only things which does not work. It is required that keywords lexer rule https://github.com/Nic30/hdlConvertor/blob/master/grammars/verilogPreprocLexer.g4#L118 will set the language version (in action)...
Currently the Global Interpreter Lock is held even if only C++ code is parsing. Releasing GIL during this time will make multithreading as fast as multiprocessing without need for inter...
http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/WebHome https://gitlab.com/IEEE-P1076/Packages https://opensource.ieee.org/vasg/Packages
XCI contains parameters of ipcore. component.xml contains definitions of bus interfaces. Import xci as a Unit instance. * component.xml with pregenerated values usually stored in .srcs/sources_1/bd/top_name/ip/ together with xci