[QST] Any support or examples of uint1_t x int1_t GEMM?

[Akimoto-Cris]

Is b1 x b1 GEMMs all implemented by XOR that requires uint1_t x uint1_t ? What if A=uint1_t and B=int1_t ? (e.g. A is ReLU output, B is weight)

Thanks in advance.

[hwu36]

Is b1 x b1 GEMMs all implemented by XOR that requires uint1_t x uint1_t ?

We supports both xor_popc and and_popc. See this one https://github.com/NVIDIA/cutlass/blob/master/include/cutlass/arch/mma_sm80.h#L2017 and this one https://github.com/NVIDIA/cutlass/blob/master/include/cutlass/arch/mma_sm80.h#L2084

What if A=uint1_t and B=int1_t ?

signed int1_t is impossible. sign bit would take the only available bit and you have no place to store the data.

[Akimoto-Cris]

Hi @hwu36 , I've seen works that use signed representation, e.g., Xnor-net: Imagenet classification using binary convolutional neural networks, who signed representation for both X and W and supposedly uses XNOR-Bitcount op for conv. So I think signed 1-bit W is a realistic scenario.

[hwu36]

Maybe it is a question to the paper author. I don't know how to pack signed bit and data bit into 1 bit. xoring with signed bit also sounds strange to me. Maybe they used 0 to represent -1? If so, that's customized data representation.

[Akimoto-Cris]

Check this post https://sushscience.wordpress.com/2017/10/01/understanding-binary-neural-networks/. They do use 0 to represent -1. But I suspect current xor_popc and and_popc will work on such "bipolar binary". This project seems implement xnor_popc for that: https://github.com/Xilinx/finn/issues/31

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