CLK1 & CLK2 Frequency Setting Interaction Errors when Sharing PLLB

[va7ta]

The frequency setting of either CLK1 or CLK2 outputs significantly impacts the frequency of CLK2 or CLK1 respectively by 100 KHz or more when operating at HF frequencies. The CLK that is set last is accurately set but the previously set CLK sharing the same PLL is frequency shifted.

This problem only affects CLK outputs sharing the same PLL. Since there are two PLL's the issue is only significant for applications where 3 outputs are needed as two of the outputs must share a PLL.

[NT7S]

Thank you much for the report, I will be digging into this shortly.

[NT7S]

Confirmed the same behavior in the Arduino version of the library. Going to copy this over to the Arduino library and conduct most of my work there. Once it is resolved in that library, I'll backport the code here.