Acer BOBBA360 (CP311-2HN) brightness changes not observable

Open psstoyanov opened this issue 2 years ago • 16 comments

Hi, I've installed the custom UEFI firmware on BOBBA360 device CP311-2HN with Fedora 38. I used EndevourOS img for secondary check.

Everything seems to work supririsngly well for daily operations with the exception of the brightness changes not being applied. It appears as if the values are changing but there is no observable difference on the unit's dispay. The same behaviour was observed on Gnome with Fedora 38 and XFCE with EndevourOS.

Has someone else observed similar behaviour?

Aug 11 '23 20:08 psstoyanov

I've not had reports of any GLK devices having issues with brightness control. your best bet for assistance is probably the chrultrabook Discord linux channel. They can help verify the correct backlight control type is being used

Aug 12 '23 22:08 MrChromebox

So far no movement in the Discord channel. The values are indeed changing in /sys/class/backlight/intel_backlight/brightness as expected but nothing observable on the unit.

I'm tempted to check with Tiny11 to verify if its Linux only or not.

Update:

Using Windows 11 with Intel UHD Graphics 600 v31.0.101.2111 - interestingly night light works but no display brightness adjustment on this unit. Or at least whatever is being adjusted doesn't reflect on the backlight itself.

Aug 14 '23 12:08 psstoyanov

Under Windows, does the backlight adjustment slider exist and not work, or not exist at all

Aug 14 '23 17:08 MrChromebox

It exists but doesn't work.

I didn't bother to check why the keyboard brightness buttons, touchpad and audio don't work. To adjust the brightness I've went through Settings -> Display

Aug 14 '23 18:08 psstoyanov

that most likely means the backlight control type for the display is incorrect in the VBT in the firmware. Does your device have an OLED panel ?

Aug 14 '23 18:08 MrChromebox

No - it's not OLED. It should be some LCD panel but I'm not sure of the model number or if the wacom stylus support introduces some variations on this 11" model.

hw-probe lists it as:

au-optronics-auo145c (that matches the other entries for BOBBA360 on their site)

I have't used that software before so I can't be sure of its accuracy

Aug 14 '23 19:08 psstoyanov

boot linux with the following kernel param added: drm.debug=0xe

then get me the output of sudo dmesg | grep drm so I can see what's going on with the backlight detection/control

Aug 14 '23 19:08 MrChromebox

Applied drm.debug=0xe to /etc/default/grub :

/etc/defailt/grub

GRUB_TIMEOUT=5
GRUB_DISTRIBUTOR="$(sed 's, release .*$,,g' /etc/system-release)"
GRUB_DEFAULT=saved
GRUB_DISABLE_SUBMENU=true
GRUB_TERMINAL_OUTPUT="console"
GRUB_CMDLINE_LINUX="rhgb drm.debug=0xe"
GRUB_DISABLE_RECOVERY="true"
GRUB_ENABLE_BLSCFG=true

Result from dmesg | grep drm:

dmesg | grep drm


[    4.069119] [drm:drm_client_modeset_probe] connector 144 enabled? yes
[    4.069121] [drm:drm_client_modeset_probe] connector 152 enabled? no
[    4.069123] [drm:drm_client_modeset_probe] connector 163 enabled? no
[    4.069128] [drm:drm_client_modeset_probe] Not using firmware configuration
[    4.069130] [drm:drm_client_modeset_probe] looking for cmdline mode on connector 144
[    4.069133] [drm:drm_client_modeset_probe] looking for preferred mode on connector 144 0
[    4.069135] [drm:drm_client_modeset_probe] found mode 1366x768
[    4.069137] [drm:drm_client_modeset_probe] picking CRTCs for 1366x768 config
[    4.069140] [drm:drm_client_modeset_probe] desired mode 1366x768 set on crtc 68 (0,0)
[    4.083601] i915 0000:00:02.0: [drm:drm_mode_getconnector] User-space requested a forced probe on [CONNECTOR:144:eDP-1] but is not the DRM master, demoting to read-only probe
[    4.083672] i915 0000:00:02.0: [drm:drm_mode_getconnector] User-space requested a forced probe on [CONNECTOR:152:DP-1] but is not the DRM master, demoting to read-only probe
[    4.083685] i915 0000:00:02.0: [drm:drm_mode_getconnector] User-space requested a forced probe on [CONNECTOR:163:DP-2] but is not the DRM master, demoting to read-only probe
[    4.091837] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[    4.120623] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[    4.131751] [drm:drm_mode_setcrtc] [CRTC:68:pipe A]
[    4.131777] [drm:drm_mode_setcrtc] [CONNECTOR:144:eDP-1]
[    4.153153] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:144:eDP-1]
[    4.153175] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:144:eDP-1]
[    4.153429] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [ENCODER:143:DDI A/PHY A] MST support: port: no, sink: no, modparam: yes
[    4.153641] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
[    4.153851] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
[    4.154102] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
[    4.155639] i915 0000:00:02.0: [drm:update_display_info.part.0] [CONNECTOR:144:eDP-1] Assigning EDID-1.4 digital sink color depth as 6 bpc.
[    4.155652] i915 0000:00:02.0: [drm:update_display_info.part.0] [CONNECTOR:144:eDP-1] ELD monitor 
[    4.155657] i915 0000:00:02.0: [drm:update_display_info.part.0] [CONNECTOR:144:eDP-1] ELD size 20, SAD count 0
[    4.155667] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] [CONNECTOR:144:eDP-1] VRR capable: no
[    4.155944] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] [CONNECTOR:144:eDP-1] DFP max bpc 0, max dotclock 0, TMDS clock 0-0, PCON Max FRL BW 0Gbps
[    4.157891] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] PCON ENCODER DSC DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00
[    4.158174] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] [CONNECTOR:144:eDP-1] RGB->YcbCr conversion? no, YCbCr 4:2:0 allowed? no, YCbCr 4:4:4->4:2:0 conversion? no
[    4.159110] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:144:eDP-1] probed modes :
[    4.159117] [drm:drm_mode_debug_printmodeline] Modeline "1366x768": 60 76300 1366 1414 1446 1600 768 772 778 794 0x48 0xa
[    4.159189] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:152:DP-1]
[    4.159195] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:152:DP-1]
[    4.159419] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:152:DP-1] disconnected
[    4.159431] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:163:DP-2]
[    4.159436] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:163:DP-2]
[    4.159654] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:163:DP-2] disconnected
[    6.082715] systemd[1]: Starting [email protected] - Load Kernel Module drm...
[    6.190617] audit: type=1130 audit(1692084768.619:10): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=system_u:system_r:init_t:s0 msg='unit=modprobe@drm comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    6.190731] audit: type=1131 audit(1692084768.619:11): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=system_u:system_r:init_t:s0 msg='unit=modprobe@drm comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    7.214906] i915 0000:00:02.0: [drm:intel_pps_vdd_off_sync_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 turning VDD off
[    7.215175] i915 0000:00:02.0: [drm:intel_pps_vdd_off_sync_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
[    9.128842] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[    9.129137] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   10.806867] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   10.807179] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   10.807441] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   10.807678] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   10.807918] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   10.808167] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   10.825099] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   10.825379] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   10.825608] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   10.825836] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   10.826111] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   10.826338] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   10.826563] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   10.826788] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   10.827018] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   10.827245] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   10.827496] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   10.827726] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   11.185524] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   11.185810] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   11.186057] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   11.186315] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   11.186547] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   11.186774] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   11.187004] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   11.187230] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   11.187454] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   11.187679] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   11.187907] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   11.188132] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   11.188358] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   11.191683] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   11.192028] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   11.192805] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   11.208227] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   11.209444] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   11.209764] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   11.210101] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   11.210350] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   11.210583] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   11.210904] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   11.224702] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   11.225018] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   11.225247] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   11.225474] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   11.225700] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   11.225937] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   11.226164] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   11.226389] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   11.226614] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   11.226839] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   11.227640] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   11.227901] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   11.250271] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   11.252300] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   11.252604] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   11.252896] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   11.253132] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   11.253373] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   11.253637] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   11.253876] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   11.254116] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   11.254440] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   11.254685] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   11.254951] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   11.255229] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   11.255461] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   11.255701] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   11.255931] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   11.256156] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   11.256381] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   11.256605] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   11.256829] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   11.257057] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   11.257282] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   11.257552] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   11.257783] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   11.258077] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   11.274784] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   11.277523] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   11.277893] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   11.278235] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   11.278483] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   11.278715] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   11.278993] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   11.291303] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   11.291587] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   11.291831] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   11.292074] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   11.292304] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   11.292532] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   11.292757] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   11.292986] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   11.293212] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   11.293439] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   11.295914] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   11.296162] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   11.315160] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   11.315461] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   11.315700] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   11.317199] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   11.317494] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   11.317721] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   11.317952] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   11.318178] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   11.318403] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   11.318629] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   11.318856] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   11.319088] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   11.319319] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   11.322074] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   11.324181] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   11.324666] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   11.341363] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   22.973621] i915 0000:00:02.0: [drm:i915_gem_open [i915]] 
[   23.327519] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:144:eDP-1]
[   23.327542] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:144:eDP-1]
[   23.327803] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [ENCODER:143:DDI A/PHY A] MST support: port: no, sink: no, modparam: yes
[   23.328045] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
[   23.328282] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
[   23.328499] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
[   23.328733] i915 0000:00:02.0: [drm:update_display_info.part.0] [CONNECTOR:144:eDP-1] Assigning EDID-1.4 digital sink color depth as 6 bpc.
[   23.328741] i915 0000:00:02.0: [drm:update_display_info.part.0] [CONNECTOR:144:eDP-1] ELD monitor 
[   23.328746] i915 0000:00:02.0: [drm:update_display_info.part.0] [CONNECTOR:144:eDP-1] ELD size 20, SAD count 0
[   23.328756] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] [CONNECTOR:144:eDP-1] VRR capable: no
[   23.328976] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] [CONNECTOR:144:eDP-1] DFP max bpc 0, max dotclock 0, TMDS clock 0-0, PCON Max FRL BW 0Gbps
[   23.329203] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 turning VDD on
[   23.329428] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
[   23.330146] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] PCON ENCODER DSC DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00
[   23.330367] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] [CONNECTOR:144:eDP-1] RGB->YcbCr conversion? no, YCbCr 4:2:0 allowed? no, YCbCr 4:4:4->4:2:0 conversion? no
[   23.331301] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:144:eDP-1] probed modes :
[   23.331306] [drm:drm_mode_debug_printmodeline] Modeline "1366x768": 60 76300 1366 1414 1446 1600 768 772 778 794 0x48 0xa
[   23.331405] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:152:DP-1]
[   23.331412] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:152:DP-1]
[   23.331690] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:152:DP-1] disconnected
[   23.331749] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:163:DP-2]
[   23.331755] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:163:DP-2]
[   23.331974] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:163:DP-2] disconnected
[   24.000691] i915 0000:00:02.0: [drm:i915_gem_open [i915]] 
[   25.620138] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   25.620482] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   25.620747] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   25.620996] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   25.621232] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   25.623006] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   25.627706] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   25.628027] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   25.628269] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   25.628498] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   25.628725] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   25.628952] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   25.629188] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   25.629414] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   25.629638] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   25.629865] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   25.631345] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   25.631632] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   25.663016] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   25.663304] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   25.663547] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   25.663824] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   25.664070] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   25.664297] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   25.664523] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   25.664749] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   25.664983] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   25.665208] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   25.665433] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   25.665657] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   25.665882] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   25.666144] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   25.666374] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   25.666624] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   25.677340] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   25.739245] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   25.741368] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   25.741699] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   25.741938] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   25.742217] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   25.742488] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   25.743646] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   25.743928] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   25.744165] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   25.744390] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   25.744614] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   25.744838] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   25.745077] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   25.745302] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   25.745526] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   25.745751] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   25.746007] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   25.746236] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   25.779892] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   25.780196] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   25.780435] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   25.780671] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   25.780905] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   25.783000] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   25.783295] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   25.783528] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   25.783761] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   25.822344] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   25.822630] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   25.822867] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   25.823142] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   25.823375] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   25.823603] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   25.823829] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   25.824062] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   25.824295] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   25.824525] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   25.824753] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   25.825007] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   25.825249] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   25.825509] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   25.825748] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   25.826009] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   25.826992] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   25.843283] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   25.843692] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   25.843988] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   25.844225] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   25.844484] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   25.845172] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   25.860201] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   25.860482] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   25.860710] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   25.860935] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   25.861179] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   25.861405] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   25.861629] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   25.861854] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   25.862094] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   25.862321] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   25.862572] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   25.862801] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   25.887396] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   25.887684] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   25.887920] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   25.888177] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   25.888411] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   25.888644] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   25.888876] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   25.889118] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   25.889354] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   25.893329] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   25.893614] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   25.893850] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   25.894115] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   25.894346] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   25.894572] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   25.894797] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   25.895029] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   25.895260] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   25.895487] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   25.895713] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   25.895943] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   25.896184] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   25.896433] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   25.896663] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   25.896909] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   25.910245] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   25.910573] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   25.910878] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   25.911151] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   25.911387] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   25.911620] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   25.911981] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   25.926800] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   25.927104] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   25.927333] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   25.927559] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   25.927783] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   25.928021] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   25.928247] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   25.928472] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   25.928697] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   25.928924] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   25.929183] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   25.929418] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   25.954361] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   25.954648] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   25.954885] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   25.955143] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   25.955377] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   25.955609] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   25.955840] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   25.956079] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   25.956312] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   25.962520] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   25.962805] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   25.963098] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   25.963351] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   25.963583] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   25.963812] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   25.964051] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   25.964275] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   25.964498] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   25.964721] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   25.964944] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   25.965175] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   25.965401] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   25.965647] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   25.965876] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   25.966129] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   25.976839] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   25.977162] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   25.977456] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   25.977718] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   25.977968] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   25.978203] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   25.978458] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   25.993402] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   25.993682] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   25.993911] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   25.994175] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   25.994403] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   25.994629] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   25.994853] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   25.995084] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   25.995309] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   25.995535] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   25.995869] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   25.996130] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.021357] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.021644] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.021881] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.022131] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.022373] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.022617] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.022859] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.023121] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.023366] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.027950] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.028247] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.028485] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.028738] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.028977] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.029204] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.029430] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.029654] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.029879] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.030110] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.030334] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.030558] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.030782] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.031042] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.031272] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.031520] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.043443] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   26.176944] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   26.180851] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   26.181187] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.181425] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   26.181659] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   26.182996] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   26.193208] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.193489] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.193717] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.193944] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.194186] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.194414] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.194639] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.194863] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.195096] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.195323] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.198010] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.198299] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.222456] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.222747] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.223864] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.224496] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.224739] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.225573] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.225833] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.226668] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.229995] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.232080] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.232373] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.232608] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.232862] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.233099] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.233325] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.233549] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.233773] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.234004] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.234229] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.234453] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.234677] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.234902] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.235157] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.235387] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.235636] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.243242] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   26.243559] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   26.243858] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   26.244139] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.244378] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   26.244618] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   26.244905] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   26.259808] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.260095] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.260323] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.260549] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.260774] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.261010] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.261235] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.261460] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.261684] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.261910] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.262168] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.262399] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.301200] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.301493] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.301731] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.303993] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.304289] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.304524] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.304758] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.305006] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.305239] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.306868] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.307185] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.307420] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.307673] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.307904] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.308137] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.308363] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.308587] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.308812] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.309040] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.309265] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.309488] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.309713] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.309969] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.310198] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.310446] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.326500] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   26.326821] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   26.327121] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   26.327383] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.327618] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   26.327852] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   26.328113] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   26.344010] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.344286] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.344515] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.344740] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.345001] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.345225] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.345449] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.345675] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.345901] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.346136] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.349015] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.349727] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.361980] i915 0000:00:02.0: [drm:intel_pps_vdd_off_sync_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 turning VDD off
[   26.362250] i915 0000:00:02.0: [drm:intel_pps_vdd_off_sync_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
[   26.369586] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.369873] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.370129] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.370370] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.370604] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.370838] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.371083] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.371317] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.371550] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.373118] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.373390] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.373625] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.373877] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.374121] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.374347] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.374572] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.374797] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.375025] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.375250] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.375474] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.375697] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.375923] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.376173] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.376416] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.376662] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.393103] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   26.393613] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   26.393998] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   26.396515] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.396809] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   26.397059] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   26.398004] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   26.409657] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.409938] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.410183] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.410412] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.410639] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.410865] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.411095] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.411320] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.411545] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.411771] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.412042] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.412273] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.464236] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.464526] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.465123] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.465370] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.465604] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.465838] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.466084] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.466317] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.466549] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.470579] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.470868] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.471115] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.471370] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.471600] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.471826] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.472081] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.472307] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.472531] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.472756] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.472990] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.473216] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.473442] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.473694] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.473923] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.474210] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.476347] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   26.477421] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   26.486003] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   26.486313] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.486549] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   26.486783] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   26.487059] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   26.492968] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.493246] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.493472] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.493698] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.493923] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.494191] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.494417] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.494642] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.494867] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.495102] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.501124] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.502152] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.521039] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.521328] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.521564] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.521799] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.522061] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.522294] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.522526] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.522757] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.523006] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.524619] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.524898] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.525137] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.525389] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.525621] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.525849] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.526079] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.526316] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.526542] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.526766] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.526995] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.527220] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.527445] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.527692] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.527922] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.528170] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.543116] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   26.543433] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   26.543724] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   26.544012] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.544252] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   26.544486] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   26.544812] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   26.559507] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.559792] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.560060] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.560287] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.560512] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.560737] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.560968] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.561194] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.561419] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.561645] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.562058] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.562293] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.585187] i915 0000:00:02.0: [drm:i915_gem_open [i915]] 
[   26.586039] i915 0000:00:02.0: [drm:i915_gem_open [i915]] 
[   26.588796] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.589109] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.589347] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.589581] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.589815] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.590079] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.590312] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.590545] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.590777] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.592455] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.592803] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.593044] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.593296] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.593526] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.593752] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.593981] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.594205] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.594430] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.594654] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.594878] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.595106] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.595332] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.595580] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.595809] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.596059] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.609554] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   26.609880] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   26.610189] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   26.610459] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.610707] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   26.610957] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   26.611255] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   26.626109] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.626391] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.626620] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.626847] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.627090] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.627316] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.627541] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.627766] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.627999] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.628226] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.628489] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.628720] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.653190] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.653485] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.653868] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.654138] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.654373] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.654606] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.654838] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.655125] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.655360] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.657265] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.657558] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.657790] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.658052] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.658282] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.658509] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.658735] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.658962] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.659187] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.659423] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.659648] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.659871] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.660099] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.660344] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.660572] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.660813] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.676147] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   26.676458] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   26.676751] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   26.677022] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.677259] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   26.677494] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   26.677811] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   26.692710] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.693003] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.693231] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.693457] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.693683] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.693908] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.694148] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.694373] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.694598] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.694824] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.697709] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.698003] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.724873] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.725190] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.725428] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.725664] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.725901] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.730972] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.731260] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.731492] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.731724] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.733327] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.733612] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.733844] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.734108] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.734338] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.734563] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.734787] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.735018] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.735242] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.735466] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.735690] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.735914] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.736143] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.736392] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.736621] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.736869] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.742748] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   26.743068] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   26.743356] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   26.743611] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.743847] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   26.744092] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   26.744666] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   26.759312] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.759592] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.759820] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.760068] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.760298] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.760524] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.760749] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.760981] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.761210] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.761437] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.761700] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.761931] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.794494] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.794787] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.795541] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   26.795810] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.796079] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.796327] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   26.796560] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.796793] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.797054] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   26.798722] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   26.799019] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   26.799253] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   26.799505] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   26.799735] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   26.799971] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   26.800197] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   26.800421] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   26.800643] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   26.800868] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   26.801098] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   26.801322] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   26.801546] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   26.801795] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   26.802027] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   26.802275] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   26.809351] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   27.561828] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   27.619227] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:173]
[   27.643441] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   27.660023] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:172]
[   27.780820] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   27.897083] i915 0000:00:02.0: [drm:i915_gem_open [i915]] 
[   27.988472] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:172]
[   28.104097] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   28.166598] i915 0000:00:02.0: [drm:i915_gem_open [i915]] 
[   28.256382] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   28.277234] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   28.344269] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   28.360389] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   28.377718] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   28.393254] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   28.409657] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   28.426438] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   28.443186] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   28.460071] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   28.476540] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   28.493861] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   28.510431] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   28.527543] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.089613] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.219961] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.256566] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.276033] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.289889] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.306418] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.373541] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.397858] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.406036] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.422871] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.439901] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.456106] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.472859] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.505782] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.523508] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.540348] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.557239] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.573090] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   32.590598] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   32.607721] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   33.318387] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   33.323839] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   33.431221] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   33.439081] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   33.495302] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   33.505233] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   33.578735] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   33.588576] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   33.674792] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   33.688377] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   33.773396] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   33.858783] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   33.871851] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   33.961976] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   33.971517] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.263620] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.271033] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.497215] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.507867] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.521562] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.538411] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.555008] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.571548] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.588099] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.604596] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.621641] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.638449] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.651704] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:169] from all active usage due to RMFB ioctl
[   34.654504] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.671595] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.687887] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.704382] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.722520] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.734984] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:171] from all active usage due to RMFB ioctl
[   34.737694] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.754287] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.771200] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.787634] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.804266] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.821034] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.837628] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.854210] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.870871] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.887313] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.903883] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.920279] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.936973] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.953526] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   34.970120] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   34.987436] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.003425] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.021178] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.037582] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.054084] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.070851] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.088210] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.104406] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.126359] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.140640] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.153882] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.170542] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.184577] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:169] from all active usage due to RMFB ioctl
[   35.187446] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.204015] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.220604] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.238022] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.253523] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.270819] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.288784] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.304760] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.321431] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.337944] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   35.354661] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:169]
[   35.373562] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   36.090584] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.091455] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.091751] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.092006] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.092241] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.092506] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.100701] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.100986] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.101214] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.101442] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.101669] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.101896] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.102141] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.102379] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.102616] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.102857] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.108387] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.108681] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.130989] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.131288] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.131536] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.131809] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.132073] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.132312] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.132550] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.132785] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.133026] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.133259] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.133488] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.133715] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.133949] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.138967] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.139259] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.139521] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.151017] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.212206] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.212563] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.212863] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.213119] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.213354] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.215273] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.216620] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.216914] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.217147] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.217375] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.217599] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.217824] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.218053] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.218279] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.218503] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.218729] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.222633] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.222918] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.226635] i915 0000:00:02.0: [drm:i915_gem_open [i915]] 
[   36.243432] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.243711] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.243979] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.244215] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.244449] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.244683] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.244916] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.245164] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.245398] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.274725] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.275021] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.275259] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.275523] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.275767] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.276016] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.276252] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.276488] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.276723] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.276961] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.277197] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.277433] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.277669] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.278360] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.278608] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.278860] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.283371] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.314331] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.314744] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.315026] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.315263] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.315497] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.315758] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.316524] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.316760] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.317010] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.317235] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.317459] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.317683] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.317907] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.318138] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.318362] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.318587] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.323323] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.323607] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.334536] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:144:eDP-1]
[   36.334555] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:144:eDP-1]
[   36.334817] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [ENCODER:143:DDI A/PHY A] MST support: port: no, sink: no, modparam: yes
[   36.335067] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
[   36.335287] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
[   36.335504] i915 0000:00:02.0: [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
[   36.335785] i915 0000:00:02.0: [drm:update_display_info.part.0] [CONNECTOR:144:eDP-1] Assigning EDID-1.4 digital sink color depth as 6 bpc.
[   36.335795] i915 0000:00:02.0: [drm:update_display_info.part.0] [CONNECTOR:144:eDP-1] ELD monitor 
[   36.335799] i915 0000:00:02.0: [drm:update_display_info.part.0] [CONNECTOR:144:eDP-1] ELD size 20, SAD count 0
[   36.335811] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] [CONNECTOR:144:eDP-1] VRR capable: no
[   36.336037] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] [CONNECTOR:144:eDP-1] DFP max bpc 0, max dotclock 0, TMDS clock 0-0, PCON Max FRL BW 0Gbps
[   36.336264] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 turning VDD on
[   36.336481] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
[   36.338391] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] PCON ENCODER DSC DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00
[   36.338668] i915 0000:00:02.0: [drm:intel_dp_set_edid [i915]] [CONNECTOR:144:eDP-1] RGB->YcbCr conversion? no, YCbCr 4:2:0 allowed? no, YCbCr 4:4:4->4:2:0 conversion? no
[   36.341440] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:144:eDP-1] probed modes :
[   36.341453] [drm:drm_mode_debug_printmodeline] Modeline "1366x768": 60 76300 1366 1414 1446 1600 768 772 778 794 0x48 0xa
[   36.341658] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:152:DP-1]
[   36.341666] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:152:DP-1]
[   36.342010] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:152:DP-1] disconnected
[   36.342070] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:163:DP-2]
[   36.342076] i915 0000:00:02.0: [drm:intel_dp_detect [i915]] [CONNECTOR:163:DP-2]
[   36.342334] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:163:DP-2] disconnected
[   36.347965] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.348252] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.348488] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.348724] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.348972] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.349206] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.351489] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.351794] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.352051] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.356559] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.356846] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.357091] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.357345] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.357576] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.357802] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.358031] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.358256] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.358481] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.358706] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.358946] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.359171] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.359397] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.359648] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.359880] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.360138] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.366574] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.366880] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.367175] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.367433] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.367667] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.367899] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.368154] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.383123] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.383403] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.383629] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.383855] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.384099] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.384325] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.384549] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.384773] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.385002] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.385229] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.385541] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.385772] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.414284] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.414572] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.414809] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.415102] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.415338] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.415743] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.415996] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.416229] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.416462] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.422670] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.422961] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.423198] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.423451] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.423684] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.423912] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.424153] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.424379] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.424603] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.424828] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.425057] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.425281] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.425506] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.425756] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.425991] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.426242] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.433176] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.433490] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.433781] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.434062] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.434299] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.434532] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.435132] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.449740] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.450040] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.450276] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.450505] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.450728] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.450971] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.451202] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.451431] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.451654] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.451885] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.452169] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.452399] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.479201] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.479491] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.479727] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.479989] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.480224] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.480456] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.480688] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.480940] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.481173] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.486561] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.486848] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.487112] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.487367] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.487600] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.487826] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.488065] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.488292] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.488517] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.488741] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.488984] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.489209] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.489436] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.489685] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.489915] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.490175] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.499767] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.638226] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.638574] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.638839] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.639096] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.639331] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.643119] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.649527] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.649805] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.650049] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.650275] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.650500] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.650724] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.650960] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.651184] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.651408] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.651632] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.655032] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.655325] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.678453] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.678741] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.678998] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.679235] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.679469] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.679702] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.679959] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.680199] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.680433] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.681976] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.682260] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.682494] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.682758] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.683005] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.683233] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.683459] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.683683] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.683908] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.684156] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.684381] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.684605] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.684829] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.685083] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.685313] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.685562] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.699572] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.699896] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.700242] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.700501] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.700737] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.700992] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.701252] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.716126] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.716406] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.716635] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.716863] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.717112] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.717339] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.717564] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.717788] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.718019] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.718245] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.718537] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.718769] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.753833] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.755942] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.756241] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.756478] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.756712] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.756959] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.758945] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.759243] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.759479] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.763107] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.763394] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.763631] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.763884] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.764128] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.764355] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.764581] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.764804] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.765033] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.765259] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.765484] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.765709] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.765938] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.766188] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.766417] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.766666] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.782821] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.785945] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.787006] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.787270] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.787505] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.787738] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.788956] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.799378] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.799660] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.799889] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.800130] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.800357] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.800583] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.800809] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.801041] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.801267] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.801495] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.803969] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.804258] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.826568] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.826856] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.827118] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.827355] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.827589] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.827822] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.828170] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.828405] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.828638] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.830059] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.830341] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.830575] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.830827] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.831071] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.831300] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.831525] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.831750] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.831977] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.832202] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.832426] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.832665] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.832891] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.833142] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.833372] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.833616] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.849427] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.849733] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.850023] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.850290] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.850527] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.850762] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.851077] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.866002] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.866289] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.866510] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.866726] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.866969] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.867226] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.867450] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.867674] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.867899] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.868131] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.868388] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.868618] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.893808] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.894102] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.894337] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.894569] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.894801] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.897690] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.898003] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.898239] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.898473] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.902273] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.902562] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.902796] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.903081] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.903312] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.903536] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.903760] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.903990] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.904213] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.904436] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.904659] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.904882] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.905128] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.905377] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.905606] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.905854] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.916030] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.916344] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.916631] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.916888] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.917134] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.917366] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.919493] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.932589] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.932867] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.933111] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.933336] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.933558] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.933791] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.934023] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.934246] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.934469] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.934693] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.938112] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.938407] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.959928] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.960214] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.960447] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   36.960680] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.960911] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.962766] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   36.963050] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.963283] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.963516] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   36.966626] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.966934] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   36.967169] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   36.967420] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.967650] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.967875] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.968131] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   36.968356] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   36.968579] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   36.968803] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   36.969033] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   36.969257] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   36.969481] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   36.969731] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   36.969984] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   36.970234] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   36.982626] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   36.983395] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   36.983691] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   36.984503] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   36.984745] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   36.984994] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   36.986129] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   36.999195] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   36.999475] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   36.999700] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   36.999940] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   37.000164] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   37.000387] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   37.000611] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   37.000833] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   37.001064] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   37.001289] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   37.004494] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   37.004787] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   37.027743] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.028040] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.028275] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.028508] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.028741] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.028983] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.029216] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.029448] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.029679] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.031108] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   37.031392] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   37.031625] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   37.031875] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   37.032113] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   37.032338] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   37.032576] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   37.032800] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   37.033028] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   37.033252] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   37.033476] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   37.033700] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   37.033927] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   37.034176] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   37.034405] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   37.034649] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   37.049253] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   37.049565] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   37.049858] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   37.050153] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   37.050389] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   37.050624] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   37.050878] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   37.065779] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   37.066068] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   37.066297] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   37.066523] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   37.066749] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   37.066997] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   37.067224] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   37.067451] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   37.067675] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   37.067901] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   37.068244] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   37.068475] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   37.092178] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.092468] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.092703] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.092951] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.093185] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.093417] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.093648] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.093880] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.094116] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.095736] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   37.096023] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   37.096257] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   37.096508] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   37.096738] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   37.096984] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   37.097209] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   37.097433] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   37.097658] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   37.097882] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   37.098110] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   37.098336] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   37.098562] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   37.098812] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   37.099069] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   37.099317] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   37.115840] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   37.116180] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   37.116527] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   37.116785] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   37.117039] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   37.117272] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   37.117527] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   37.132382] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   37.132666] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   37.132893] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   37.133144] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   37.133370] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   37.133594] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   37.133818] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   37.134055] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   37.134280] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   37.134505] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   37.134757] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   37.134992] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   37.159216] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.159496] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.159723] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.160021] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.160255] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.160488] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.160721] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.160974] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.161207] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.162689] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   37.162987] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   37.163222] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   37.163475] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   37.163705] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   37.163942] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   37.164168] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   37.164392] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   37.164617] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   37.164841] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   37.165073] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   37.165298] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   37.165523] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   37.165788] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   37.166030] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   37.166277] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   37.182483] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   37.182784] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   37.183091] i915 0000:00:02.0: [drm:i915_audio_component_get_power [i915]] restored AUD_FREQ_CNTRL to 0x10
[   37.183349] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   37.183586] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 316800 kHz, actual 316800 kHz
[   37.183821] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 13, actual 13
[   37.184085] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 316800 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 13
[   37.198998] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   37.199296] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   37.199515] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   37.199731] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   37.199974] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   37.200211] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   37.200449] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   37.200687] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   37.200928] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   37.201165] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   37.201427] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   37.201669] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   37.227207] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.227496] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.227731] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   37.229102] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.229391] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.229624] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   37.229856] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.231283] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.231581] i915 0000:00:02.0: [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   37.233997] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] Can change cdclk cd2x divider with pipe A active
[   37.234293] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
[   37.234529] i915 0000:00:02.0: [drm:intel_modeset_calc_cdclk [i915]] New voltage level calculated to be logical 4, actual 4
[   37.234785] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:143:DDI A/PHY A]
[   37.235036] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:151:DDI B/PHY B]
[   37.235265] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:153:DP-MST A]
[   37.235491] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:154:DP-MST B]
[   37.235716] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:155:DP-MST C]
[   37.235950] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:162:DDI C/PHY C]
[   37.236175] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:164:DP-MST A]
[   37.236401] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:165:DP-MST B]
[   37.236625] i915 0000:00:02.0: [drm:intel_modeset_verify_disabled [i915]] [ENCODER:166:DP-MST C]
[   37.236851] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL A
[   37.237119] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL B
[   37.237349] i915 0000:00:02.0: [drm:verify_single_dpll_state [i915]] PORT PLL C
[   37.237599] i915 0000:00:02.0: [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz, bypass 19200 kHz, voltage level 4
[   37.249036] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   39.353939] i915 0000:00:02.0: [drm:intel_pps_vdd_off_sync_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 turning VDD off
[   39.354208] i915 0000:00:02.0: [drm:intel_pps_vdd_off_sync_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
[   41.528791] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   41.969286] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   42.062146] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   42.091557] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   43.656788] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling PW_2
[   43.657523] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling dpio-common-b
[   43.657887] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX_B
[   43.671916] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.682905] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.693902] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.704911] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.724912] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.735901] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.746900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.757905] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.768901] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.779900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.790904] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.801900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.813900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.824902] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.836602] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.847903] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.858900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.869900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.880902] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.891903] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.902899] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.913902] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.924901] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.935900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.946899] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.957903] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.968901] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.979899] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   43.990899] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   44.001909] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   44.012899] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   44.023900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX B/DDI B/PHY B: timeout (status 0x7d40023f)
[   44.024153] i915 0000:00:02.0: [drm:drm_dp_dpcd_access [drm_display_helper]] AUX B/DDI B/PHY B: Too many retries, giving up. First error: -110
[   44.027038] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling dpio-common-c
[   44.027451] i915 0000:00:02.0: [drm:intel_power_well_enable [i915]] enabling AUX_C
[   44.037900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.048900] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.060920] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.071914] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.082922] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.093126] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   44.102916] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.113927] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.124913] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.129942] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling AUX_B
[   44.130234] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling dpio-common-b
[   44.135796] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   44.136547] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.148179] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   44.149627] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.160921] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.165184] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   44.171901] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.177797] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   44.182904] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.194762] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.205901] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.216899] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.227901] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.238899] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.249898] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.260901] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.271914] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.282917] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.294599] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.304913] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.315911] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.327846] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.339911] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.350913] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.362915] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.373912] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.384917] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.395917] i915 0000:00:02.0: [drm:intel_dp_aux_xfer [i915]] AUX C/DDI C/PHY C: timeout (status 0x7d40023f)
[   44.396192] i915 0000:00:02.0: [drm:drm_dp_dpcd_access [drm_display_helper]] AUX C/DDI C/PHY C: Too many retries, giving up. First error: -110
[   44.398265] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 turning VDD on
[   44.398550] i915 0000:00:02.0: [drm:intel_pps_vdd_on_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
[   44.428623] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   44.513307] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   44.540936] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   44.601933] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling AUX_C
[   44.602227] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling dpio-common-c
[   44.602489] i915 0000:00:02.0: [drm:intel_power_well_disable [i915]] disabling PW_2
[   44.656913] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   44.678168] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.218817] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.250924] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.261615] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.277983] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.294433] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.310931] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.327208] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.344529] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.360848] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.379200] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.394194] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.411217] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.430611] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.444059] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.462845] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.477327] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.494004] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.510634] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.527242] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.540797] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:171] from all active usage due to RMFB ioctl
[   45.546422] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.560405] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.579366] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.593853] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.610884] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.626808] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.641643] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:171] from all active usage due to RMFB ioctl
[   45.648200] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.660712] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.677311] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.690726] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:170] from all active usage due to RMFB ioctl
[   45.697238] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.714447] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.734481] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.762431] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.777364] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.793675] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.810358] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.823869] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:171] from all active usage due to RMFB ioctl
[   45.827280] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.843619] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.860443] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.876980] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.894562] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.912356] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.926960] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.943845] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.960689] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   45.976983] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   45.993497] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.010204] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.026878] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.044100] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.060874] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.076839] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.093376] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.118420] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.136729] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.159940] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.176761] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.193362] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.209956] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.226695] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.243370] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.260096] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.276974] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.293236] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.309872] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.326172] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.343157] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.359781] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.376484] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.393103] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.409728] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.426924] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.443312] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.460778] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.476651] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.493013] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.509605] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.526415] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.543284] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.559555] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.576207] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.593258] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.609574] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.626201] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.642865] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.658995] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.676338] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.693097] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.709477] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.726108] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.742777] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.759638] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.776069] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.792700] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.809451] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.826201] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.844846] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.859453] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.876324] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.895069] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.910230] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.926122] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.942480] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.959183] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   46.975991] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   46.992486] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.009420] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.025983] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.042473] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.059117] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.075871] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.092570] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.109608] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.125185] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.143430] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.158988] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.175616] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.194621] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.208678] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.225937] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.244015] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.258216] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.278099] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.294251] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.308815] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.325477] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.342111] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.360110] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.377180] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.394930] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.417920] i915 0000:00:02.0: [drm:intel_pps_vdd_off_sync_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 turning VDD off
[   47.418192] i915 0000:00:02.0: [drm:intel_pps_vdd_off_sync_unlocked [i915]] [ENCODER:143:DDI A/PHY A] PPS 0 PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
[   47.419184] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.425029] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.442026] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.459125] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.475226] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.488866] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:170] from all active usage due to RMFB ioctl
[   47.492449] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.508556] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.525310] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.541761] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.558490] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.575156] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.591851] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.608449] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.625340] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.641780] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.658366] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.675069] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.691728] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.764137] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.792790] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.868992] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.878914] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   47.957221] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   47.974190] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   48.240203] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   48.257335] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   48.492907] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   48.626234] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   48.640407] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   48.662163] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   48.728830] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   48.759459] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   48.839494] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   48.859080] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   48.922767] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   48.944853] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   49.029216] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   49.061134] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   49.227754] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   49.258348] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   49.622597] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   49.642319] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   49.757183] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   49.789834] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   49.945497] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   49.971923] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   50.092009] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   50.121993] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   50.693029] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   51.293856] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   51.904916] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   52.043630] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   52.077313] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   52.084416] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:170] from all active usage due to RMFB ioctl
[   52.557768] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   52.567109] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:171] from all active usage due to RMFB ioctl
[   52.591712] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   53.157302] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   53.459383] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   53.492906] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   54.058620] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   54.191789] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   54.226536] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   54.427429] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   54.462030] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   54.475367] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   54.492127] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   54.624014] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   54.640809] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   54.724280] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   54.758300] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   54.857575] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   54.890578] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   54.973947] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   55.008739] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   55.106419] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   55.123371] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   55.422945] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   55.506780] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   55.622754] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   56.006141] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   56.239383] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   57.238400] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   57.306067] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   57.323149] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   57.356274] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   57.389736] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   57.423580] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   57.456263] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   57.489293] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   57.522934] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   57.556206] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   57.589361] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   57.622607] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   57.823755] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   57.970462] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:170]
[   57.970541] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:64:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm
[   57.970811] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:64:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->    2,   2,   2,   2,   2,   2,   2,   2,   0,   0,    0
[   57.971055] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:64:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->    7,   7,   7,   7,   7,   7,   7,   7,  21,   0,    0
[   57.971280] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:64:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->    8,   8,   8,   8,   8,   8,   8,   8,  22,   0,    0
[   58.421681] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   58.739809] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   59.021587] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   59.604385] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   59.634613] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   59.651024] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   59.660530] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:174] from all active usage due to RMFB ioctl
[   60.218203] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   60.817297] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   61.417547] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   61.904114] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   61.904153] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:175]
[   61.920283] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   61.920325] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[   62.019453] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   62.419309] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   62.452827] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   62.484654] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   62.518556] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   62.551597] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   62.584821] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   62.618349] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   62.651546] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   62.668368] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   62.884534] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   62.968631] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   62.984780] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.017778] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.051055] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.084251] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.117653] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.151303] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.184628] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.217605] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.250860] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.268458] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.317713] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.335008] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.367632] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.401632] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.434053] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.467790] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.500518] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.517067] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.550129] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.583826] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.617511] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.650806] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.684278] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.717611] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.767674] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.801231] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.833360] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.867447] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.900073] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.934162] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   63.966535] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   63.972508] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:174] from all active usage due to RMFB ioctl
[   64.000788] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   64.033131] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   64.050648] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   64.083754] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   64.217163] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   64.250426] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   64.266998] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   64.299599] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   64.334081] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   64.366593] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   64.432637] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   64.466508] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   64.766418] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   66.281683] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   66.297278] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   66.331449] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   66.364742] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   66.397580] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   66.431466] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   66.464717] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   66.498112] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   66.531057] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   66.564661] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   66.581364] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   66.614073] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   66.647581] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   66.680743] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   66.715023] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   66.747226] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   66.781678] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.130567] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.164339] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.196985] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.230560] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.263487] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.296782] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.314071] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.346933] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.380928] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.414091] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.446921] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.480758] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.513461] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.547121] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.562741] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.596087] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.630132] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.662825] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.696573] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.780605] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.830540] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.862609] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.896717] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.929231] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   67.962969] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   67.996372] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   68.096037] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   68.528794] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   68.562418] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   68.595475] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   68.629424] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   68.662301] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   68.728726] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   68.795416] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   68.828967] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   68.895553] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   68.927781] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   68.961876] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   68.978508] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   69.011259] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   69.044943] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   69.078039] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   69.645190] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   69.744962] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   69.777800] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   69.811265] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   69.845314] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   69.861197] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   69.894591] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   69.927739] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   69.961553] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   69.994306] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.027432] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.060989] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.093941] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.111611] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.143836] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.311110] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.343779] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.377978] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.410463] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.443563] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.476784] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.509959] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.527120] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.560843] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.593768] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.626786] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.660478] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.693549] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.726702] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.759559] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.793438] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.827206] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   70.860232] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   70.876297] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.243157] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   71.275757] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.309657] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   71.342176] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.376086] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   71.408677] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.426076] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   71.459959] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.492076] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   71.526142] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.558543] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   71.592455] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.625282] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   71.675880] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.709415] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   71.798252] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.822524] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   71.856501] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   71.874248] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   72.605476] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   72.639705] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   72.671581] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   72.689277] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.022156] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.089170] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.122065] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.154935] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.188122] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.205220] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.238944] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.304724] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.323188] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.354590] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.388070] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.572025] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.604475] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.638398] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.670952] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.705257] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.724182] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.758030] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.791161] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.823604] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   73.856818] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   73.924465] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.007247] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.040464] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.073464] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.107088] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.140066] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.173459] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.190563] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.223871] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.257023] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.289890] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.323664] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.356528] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.390627] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.722537] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.755998] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.789648] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.822637] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.856588] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.889493] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.922456] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   74.956007] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   74.989986] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   75.022094] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   75.039555] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   75.072600] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   75.106262] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   75.765943] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   75.766284] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   75.788925] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   75.798472] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   75.918617] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   75.918971] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   76.080326] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   76.080699] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   76.351011] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=18250/19200
[   76.351349] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 18250
[   76.353952] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   76.523493] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=17300/19200
[   76.523881] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 17300
[   76.529993] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   76.691811] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=16350/19200
[   76.692182] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 16350
[   76.697829] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   76.856419] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=15400/19200
[   76.856800] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 15400
[   76.862518] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   77.052629] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=16350/19200
[   77.053031] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 16350
[   77.063405] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   77.216796] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=17300/19200
[   77.217168] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 17300
[   77.228861] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   77.331673] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   77.380897] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=18250/19200
[   77.381268] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 18250
[   77.395874] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   77.535036] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   77.535406] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   77.545570] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   77.676821] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   77.677191] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   78.212971] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   78.247668] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   78.280517] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   78.314869] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   78.347000] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   78.381764] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   78.401588] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   78.432309] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   78.464514] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   78.497656] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   78.531338] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   78.631469] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   78.831395] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   78.864456] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   78.896600] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   78.930634] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   78.963365] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   78.997578] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   79.016035] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   79.046451] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   79.080202] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   79.180401] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   79.279716] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   79.314857] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   79.967485] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=18250/19200
[   79.967785] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 18250
[   79.981540] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   80.121556] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=17300/19200
[   80.121944] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 17300
[   80.131599] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   80.265709] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=16350/19200
[   80.266088] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 16350
[   80.280875] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   80.374427] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=15400/19200
[   80.374809] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 15400
[   80.380357] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   80.517327] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=14450/19200
[   80.517697] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 14450
[   80.531644] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   80.645402] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=13500/19200
[   80.645814] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 13500
[   80.651535] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   80.778403] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=12550/19200
[   80.778818] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 12550
[   80.784240] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   80.917173] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=11600/19200
[   80.917561] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 11600
[   80.929600] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   81.053589] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=10650/19200
[   81.053985] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 10650
[   81.061741] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   81.185975] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=9700/19200
[   81.186343] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 9700
[   81.195449] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   81.316798] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=8750/19200
[   81.317177] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 8750
[   81.329515] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   81.587249] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=7800/19200
[   81.587633] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 7800
[   81.594220] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   81.719706] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=6850/19200
[   81.720114] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 6850
[   81.730836] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   81.855038] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=5900/19200
[   81.855408] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 5900
[   81.864493] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   81.995410] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=4950/19200
[   81.995808] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 4950
[   82.001009] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   82.141061] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=4000/19200
[   82.141461] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 4000
[   82.147532] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   82.270129] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=3050/19200
[   82.270514] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 3050
[   82.279843] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   82.405028] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=2100/19200
[   82.405420] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 2100
[   82.413707] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   82.549977] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=1150/19200
[   82.550351] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 1150
[   82.562925] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   82.694195] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=200/19200
[   82.694563] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 200
[   82.697577] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   82.853300] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=192/19200
[   82.853668] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 192
[   83.070336] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=1142/19200
[   83.070705] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 1142
[   83.080798] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   83.571718] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=2092/19200
[   83.572126] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 2092
[   83.580685] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   83.602436] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=3042/19200
[   83.602820] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 3042
[   83.613672] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   83.631139] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=3992/19200
[   83.631493] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 3992
[   83.646664] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   83.661868] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=4942/19200
[   83.662206] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 4942
[   83.680050] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   83.690212] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=5892/19200
[   83.690516] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 5892
[   83.695936] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   83.721123] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=6842/19200
[   83.721427] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 6842
[   83.729939] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   83.754505] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=7792/19200
[   83.754858] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 7792
[   83.765518] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   83.784652] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=8742/19200
[   83.785013] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 8742
[   83.798604] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   83.812961] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=9692/19200
[   83.813304] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 9692
[   83.831616] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   83.843730] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=10642/19200
[   83.844071] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 10642
[   83.848921] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   83.877775] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=11592/19200
[   83.878112] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 11592
[   83.883043] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   83.906559] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=12542/19200
[   83.906911] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 12542
[   83.913117] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   83.937185] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=13492/19200
[   83.937524] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 13492
[   83.947483] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   83.967687] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=14442/19200
[   83.968048] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 14442
[   83.980577] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   83.996197] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=15392/19200
[   83.996491] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 15392
[   84.013481] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   84.026145] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=16342/19200
[   84.026436] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 16342
[   84.030688] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   84.059683] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=17292/19200
[   84.060048] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 17292
[   84.064016] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   84.092273] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=18242/19200
[   84.092599] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 18242
[   84.097920] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   84.121052] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19192/19200
[   84.121375] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19192
[   84.130380] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   84.151606] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   84.151967] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   84.181817] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   84.182140] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   84.214029] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   84.214365] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   84.242405] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   84.242740] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   84.274394] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   84.274731] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   84.308278] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   84.309127] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   84.338141] i915 0000:00:02.0: [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=19200/19200
[   84.338463] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight [i915]] [CONNECTOR:144:eDP-1] set backlight level = 19200
[   84.912418] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   84.944611] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   84.977967] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.011227] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   85.044560] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.077928] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   85.111289] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.144814] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   85.178411] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.194909] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   85.227146] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.260357] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   85.294833] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.327415] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   85.361443] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.393700] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   85.427704] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.460945] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   85.726562] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.761124] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   85.793396] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   85.843498] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   86.026954] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   86.059270] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   86.093487] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   86.125978] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   86.326219] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   86.333975] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:171] from all active usage due to RMFB ioctl
[   86.358708] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   86.392828] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   86.426602] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   86.693065] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   86.724889] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   86.758845] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   86.792686] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   86.825776] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   86.842491] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   86.875189] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   86.908716] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   87.226597] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   87.259028] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   87.292215] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   87.324714] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   87.359204] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   87.391467] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   87.426114] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   87.457969] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   87.492818] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   87.525762] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   87.541958] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   87.574936] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   87.608472] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   87.641768] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   87.674650] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.041176] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.075327] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.107722] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.141845] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.157788] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.191495] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.225019] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.307406] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.475885] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.508004] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.541937] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.574473] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.608850] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.641156] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.658506] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.692104] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.724959] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.757964] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.891288] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.925013] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   88.958438] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   88.991189] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.024937] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.057828] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.074590] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.108146] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.141431] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.174050] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.207838] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.240530] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.274842] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.307172] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.341668] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.357800] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.674875] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.707396] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.741808] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.774365] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.808009] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.840684] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.874905] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.907429] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.924002] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   89.957121] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   89.990554] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   90.024220] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   90.057634] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   92.192220] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   92.205107] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   92.238539] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   92.272342] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   92.455460] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   92.571112] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   92.604688] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   92.638320] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   92.671262] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   92.689516] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   92.871069] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   92.905024] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   92.937549] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   92.971576] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.004113] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.038255] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.070906] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.254792] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.287425] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.303479] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.337808] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.371468] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.403627] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.437616] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.470427] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.504476] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.536896] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.571319] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.603594] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.620804] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.654136] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.704218] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.720767] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.754083] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.771622] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.787112] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.819286] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.853412] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.885649] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.918680] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   93.935301] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   93.969544] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   94.002386] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   94.035543] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   94.069382] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   94.102341] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   94.185545] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   94.951366] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   94.985221] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.017803] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.051310] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.067590] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.101956] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.134183] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.167608] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.201442] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.234693] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.268053] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.301187] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.368154] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.401109] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.417504] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.451269] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.484541] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.517809] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.551167] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.584356] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.901165] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   95.933982] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   95.967147] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   96.001305] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   96.034594] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   96.067267] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   96.101446] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   96.134995] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   96.151396] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   96.485029] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   96.517379] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   96.550370] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   96.567316] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   96.600547] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   96.634246] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   96.667445] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   96.700785] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   96.734138] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   97.017378] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   97.050719] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   97.083985] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   97.117413] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   97.150974] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   97.183842] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   97.217879] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   97.233774] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   97.267580] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   97.566149] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   97.584081] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   97.616296] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   97.649550] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   97.683377] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   97.733384] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   97.749998] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   97.783439] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   97.816625] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   98.115563] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   98.149370] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   98.182726] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   98.200665] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   98.232115] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   98.266556] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   98.298926] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   98.332732] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   98.649539] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   98.682134] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   98.765705] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   98.781228] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   98.814946] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   98.848634] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.098538] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.131958] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.165294] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.182340] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.214135] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.248696] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.281036] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.314868] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.564319] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.598199] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.630674] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.664791] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.697362] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.731402] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.747524] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.781493] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.848416] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.881035] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[   99.915213] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[   99.947173] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.012773] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.028519] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.062527] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.095203] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.101395] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:171] from all active usage due to RMFB ioctl
[  102.128606] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.162819] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.195031] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.228329] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.234593] i915 0000:00:02.0: [drm:drm_mode_rmfb_work_fn] Removing [FB:171] from all active usage due to RMFB ioctl
[  102.261883] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.294792] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.312422] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.344957] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.379549] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.412070] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.445971] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.478500] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.512297] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.545244] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.909831] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:171]
[  102.927930] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  102.945449] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  102.945489] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:175]
[  102.978402] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.011380] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.044803] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.077261] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.111680] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.144465] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.177925] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.211227] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.244896] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.277102] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.294240] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.327151] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.360571] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.394015] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.427570] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.461269] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.744052] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.777108] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.810004] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.844376] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.876802] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.910471] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  103.943348] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  103.977122] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  104.226635] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  104.260659] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  104.294358] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  104.326637] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  104.360442] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  104.610319] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  104.643299] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  104.676552] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  104.709192] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  104.726390] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  104.759614] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  104.992314] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  105.009503] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  105.042801] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  105.076437] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  105.109531] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  105.342784] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  105.375261] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  105.409237] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  105.442877] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  105.458714] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  105.493047] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  105.726001] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  105.758883] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  105.792638] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  105.825077] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  105.859280] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  105.875862] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  105.909277] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  106.241148] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  106.291901] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  117.781963] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  123.774788] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:177]
[  137.347177] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  143.204474] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:64:cursor A]   level *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm ->  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm
[  143.205325] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:64:cursor A]   lines    2,   2,   2,   2,   2,   2,   2,   2,   0,   0,    0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0
[  143.206124] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:64:cursor A]  blocks    7,   7,   7,   7,   7,   7,   7,   7,  21,   0,    0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0
[  143.206904] i915 0000:00:02.0: [drm:skl_compute_wm [i915]] [PLANE:64:cursor A] min_ddb    8,   8,   8,   8,   8,   8,   8,   8,  22,   0,    0 ->    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0
[  143.240231] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  143.820424] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  144.419971] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  145.019092] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  145.602221] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  145.637825] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  146.203003] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  146.801884] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  147.201261] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  147.250937] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  147.418011] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  147.467824] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  147.788835] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  147.996578] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  148.031398] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  148.179689] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  148.212435] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  148.362286] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  148.395484] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  148.962249] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  148.978934] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  149.012202] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  149.579845] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  150.179879] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  150.480968] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  150.514159] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  150.547732] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  150.697408] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  150.730838] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  151.296926] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  151.629610] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  151.663745] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  151.829174] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  152.245615] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  152.278941] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  152.345814] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  152.379712] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  152.513153] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  152.546453] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  152.629630] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  152.679820] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  152.945763] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  152.996446] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  153.512280] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  153.545568] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  153.628533] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  153.661756] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  153.911760] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  153.944564] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  154.510577] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  155.077206] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  155.110789] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  155.426306] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  155.460386] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  155.626673] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  155.659772] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  155.692683] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  155.742821] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  156.292910] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  156.893652] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  157.042643] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]
[  157.057794] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:174]
[  157.091247] i915 0000:00:02.0: [drm:drm_mode_addfb2] [FB:176]

Aug 15 '23 07:08 psstoyanov

Where are these firmware blobs fetched from?

https://github.com/MrChromebox/coreboot/blob/ddaa6478511fb88e51957681dd1462eac0f3c3d7/configs/glk/config.bobba360.uefi#L14

Aug 15 '23 10:08 psstoyanov

@psstoyanov fetched from? They are built by me, and stored in the blobs repo as per the path

Aug 15 '23 13:08 MrChromebox

@psstoyanov fetched from? They are built by me, and stored in the blobs repo as per the path

Oh, nice! 👍 I thought for a second they had to be taken from some chromium repository or the like (being 3rd party and all)

Aug 15 '23 13:08 psstoyanov

no, they don't exist in any repo. Google builds them on the fly and includes them in the FW_MAIN_A/B regions. I build from the same branch but latest version and with a few tweaks

Aug 15 '23 16:08 MrChromebox

Interesting, ectool throws invalid command:

$ sudo ./ectool backlight 0
EC result 1 (INVALID_COMMAND)

Aug 19 '23 13:08 psstoyanov

that's what I'd expect for a device without a keyboard backlight. The EC has nothing to do with the screen backlight.

Aug 19 '23 14:08 MrChromebox

This is confusing. Why is there LCD reference in the command? :confused: https://chromium.googlesource.com/chromiumos/platform/ec/+/master/util/ectool.c#74

Aug 19 '23 15:08 psstoyanov

maybe some ARM-based devices use the EC for backlight control? Intel/AMD ones do not

Aug 19 '23 16:08 MrChromebox

Alright some further progress. After I haven't used the device for.... nearly a year. What I find interesting is that the digitizer also gave the ghost rendering the touch functionality unusable. The Wacom stylus is still functional.

As a reminder, the original issue highlighted that I couldn't control the brightness of the LCD apart from completely shutting it down.

First steps

I've returned the device to stock firmware with the stock image (which should override with default HWID) and the backlight adjustment doesn't work there as well. My initial feeling was something about the HWID interfering with the correct hardware behavior.

Second try with stock firmware

Moving back and forth (as the tool can't override the original firmware while the system is using CrOS) - the original firmware is now back on the device.

Results

Results of using the original firmware with correct HWID:

Backlight control is still not functional.

Further findings

Looks like something gave the ghost. What exactly I'm not sure of. After some additional observation of the hardware, I can see "bubbles" forming in the lower part of the display (right where the data/ backlight connection of the LCD is behind the lid).

The bubbles and their location behind the LCD

20240616_171359

20240616_171420_HDR

I suspect the relative who owned the device, induced water damage that slowly crept it's way through the unit (not sure if this was even registered or "worth remembering" as it was at least partially functional or functioning properly for some time).

I will send the device somewhere for further investigation or order a new display assembly.

Conclusion

In conclusion, using the custom firmware acts exactly as expected and none of the problems with this particular BOBBA360 have any connection to the scripts and the custom firmware.

@MrChromebox thank you for the support and for the incredible tool you've created! Once this little bobba360 is mended, you can be sure I will use the tool again 💯

Jun 16 '24 16:06 psstoyanov