DBT-RISE-RISCV
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Debugger cannot regain control after core executes WFI
We need a way for a debugger to regain control while the core is in in WFI.
The RISC-V Debug Specification states in section 4.3:
If halt is requested while wfi is executing, then the hart must leave the stalled state, completing this instruction’s execution, and then enter Debug Mode.
So we need something equivalent to this behavior.