Mike Thompson

@YoanFournier pointed out that the combined property takes into account the different decoding signals by using $rose(cov_assert_if.is_ebreak||cov_assert_if.is_cebreak). Since both properties have the same effect, it should be equivalent. I like...

This issue/task is out dated and can be closed: - the RVFI-Tracer was fully implemented on the CV32E40P v2.0 - the CV32E40S and CV32E40X have complete [RVFI-Tracer](https://docs.openhwgroup.org/projects/cv32e40x-user-manual/en/latest/rvfi.html) implementations. - The...

This Issue should have been closed when the CV32E40P v1.0.0 was signed-off.

Are Metrics CI regressions still running?

It is my understanding that Metrics has depreciated their cloud-based regression platform.

Yes, that makes sense. Metrics has changed their product offering and it is not clear if the regression service will be offered in the near to mid-term future.

Hi @Van2Jo, while I am not a riscv-dv developer/maintainer, we do make very extensive use of the SV implementation of riscv-dv. We solve these types of problems by extending the...

Hi @AhmedAmrAbdellatif1, simply generating atomic instructions is insufficient. Typically there will be interactions between your core and the memory sub-system that a test-program running on the core _cannot_ check, so...

> Could i use spike to help me with testing the behavior? It depends on the needs of your core. Spike has a limited modelling of the interface(s) to memory...

You can extend `riscv_asm_program_gen` and overload the `init_floating_point_gpr()` method: ``` class my_riscv_asm_program_gen extends riscv_asm_program_gen; // my implementation of init_floating_point_gpr() virtual function void init_floating_point_gpr(); int int_gpr; string str; for(int i =...