Mike Thompson

Resurrecting this discussion... >> dm_exception_addr_i[31:0], which is a primary input to the core, which is currently hardwired to 0x0 in the MCU (link). > That is not correct; it should...

Thanks for this Pascal. I knew _most_, but _not_ all of this. Very helpful. A few comments/questions: > If you are using CV32E40Pv1 or CV32E40Pv2 without FPU, accessing FPU CSR...

Yes, it seems that this issue has gone stale and we have unconsciously voted for option 2 (ignore the logs). Having said that, @halfdan-dolva made the following comment: > I...

> @MikeOpenHWGroup Isn't this done? Wow, yes it is. This one should have been closed in 2021. Slipped through the cracks. Good catch, thanks.

Ha! By coincidence, I was checking on this today. It appears that some of that "occasional breakage" has occurred, so I will investigate before closing this Issue.

Update: I now have access to Synopsys FAEs and they have provided what I think is a practical workaround, see the attached file. This workaround is currently being vetted in...

Yes, this issue was resolved and it should have been closed - my bad. Having said that, the so-called `FunctionalCoverageInvalidWithClauseSpecification` issue with VCS is still there and I am aware...

Hi @silabs-robin can you have a look at this?

Thanks @silabs-robin. We took your advice (see #2346). I am advising that we keep this issue open for now and waive it for CV32E40P v2.0.0.

Another update. See #2347.