Support for machines with native fixed-point?

[mbitsnbites]

This is a very interesting project! I wonder to what extent it aims to support CPU:s with native instructions for fixed-point operations?

For instance, some machines support certain standard Q number formats, such as Q31, Q15 and Q7. There's also the notion of halving and saturating addition. My current CPU project, MRISC32, supports some of these concepts (and so do many DSP:s and SIMD ISA:s).

Other things that may be good to support are CPU instructions for count leading zeros and similar (e.g. for calculating sqrt), which is usually available via compiler intrinsics (e.g. GCC __builtin_clz).

[MikeLankamp]

Built-in clz is already used (see include/fpm/math.hpp)

Support for native fixed-point operations is interesting. Preferably the compiler figures it out and the library doesn't need to do anything. Otherwise, some #ifdef'd inline assembly might be required. However, the architecture would need to guarantee that the calculations are exactly the same as done in C++, or you lose the cross-architecture determinism.

[mbitsnbites]

For instance gcc has known operations "smulhsm3" and friends (see https://gcc.gnu.org/onlinedocs/gccint/Standard-Names.html). I am currently trying to figure out how to make use of them to have gcc emit the corresponding MRISC32 assembler instructions.