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Published 20 hours ago • verified publisher icon Mbed-TLS

Hardware acceleration for SHA-1 and SHA-2 family using x86 SHA and ARMv8 crypto extension

Open ttc0419 opened this issue 1 year ago • 2 comments

Suggested Enhancement

Both intel and ARM has hardware support for SHA-1 and SHA-2 since 2013 and 2012. They should be implemented like AES.

Update: It seems SHA-2 is already implemented using ARM crypto extension. So, we only need:

  • [ ] ARMv8 SHA-1
  • [ ] x86 SHA-1
  • [ ] x86 SHA-2

Justification

These hash family are widely used nowadays. It will improve overall performance and efficiency.

ttc0419 avatar Jan 23 '24 13:01 ttc0419

I believe we already have SHA2 acceleration, see here.

davidhorstmann-arm avatar Jan 23 '24 13:01 davidhorstmann-arm

I believe we already have SHA2 acceleration, see here.

Thanks for pointing out, I thought the code would be organized like aes, which uses multiple file for each implementation (aes.c, aesce.c and aesni.c). I just read the code once more, so, the sha1 hardware acceleration is missing on both platforms and for sha2, only x86 acceleration is missing, right?

ttc0419 avatar Jan 23 '24 15:01 ttc0419