FPplus A prior art reference

It might be worth mentioning in the article that a similar functionality existed in legacy architectures. Cf. the "young bits" register in BESM-6: http://mailcom.com/besm6/instset.shtml

Mar 07 '16 18:03 leobru

Thank you for the link. We'll mention it in later revisions of the paper, but the operation is not quite the same as FPADDRE. I don't fully understand the "young bits" register, but the YTA pseudo-code sets the sign bit to 0, while a true FPADDRE instruction can produce negative values (e.g. for a and b with non-overlapping mantissas and |a| > |b| we have FPADDRE(a, b) == b, which can be negative)

Mar 08 '16 08:03 Maratyszcza

To perform the double precision calculations, rounding of the single precision result was suppressed (bit 2 of register R was set), therefore the "young bits" were always increasing the absolute value of the mantissa, i.e. their sign was guaranteed to be the same as the sign of the result. The decision not to replicate the sign in the representation likely had some rationale, but I won't be able to reverse-engineer it on the spot.

Mar 08 '16 08:03 leobru