ISASTM
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Manawyrm
This is really neet and thinking of forking it.
Ever thought of using a Cypress chip? Its basically an ARM with some logic blocks to do stuff like bus arbitration and has a built in usb 2.0 port. Whats best is it can run at 5 volts at 48mhz. I think I will experiment with it a bit to see if I can get it to work but either way love your project and be building it as soon as I find the chilps:P
Yup, I also have an FX3 USB3.0 board here to play around with.
In the end, USB is just the wrong protocol for this kind of application. Each bus transaction takes a very long fixed time due to USB frame lengths and this makes the result almost unusably slow.
A better interface like PCIe (or Thunderbolt), maybe Firewire would be required for proper operation.
A better interface like PCIe (or Thunderbolt), maybe Firewire would be required for proper operation.
did you ever think of LPC-to-ISA bridges? There are quite a number of x86 boards around where access to LPC is possible.
Yes! I sniffed around on the LPC of a machine I had, but the mapped memory regions were quite limited.
I was thinking about doing something like a PCI card with 2 memory BARs: 1 memory BAR would translate all R/W into ISA I/O R/W 1 memory BAR would translate all R/W into ISA Memory R/W and maybe another space for a mailbox for interrupts, DMA, etc.
That should be very easy to implement in x86 emulators and should also work on something like a Raspberry Pi. (I'm still dreaming of an ISA card with a Compute Module 4, which could emulate the CPU while having real peripherals)
I actually have a nice PCI devboard here and was playing around with it, but I'm not experienced enough with FPGAs yet to implement the timings and state machine for the PCI->ISA conversion. Then I also accepted a new job, so my time for retro fun is even more limited :cry:
Yes! I sniffed around on the LPC of a machine I had, but the mapped memory regions were quite limited.
I'm pondering to build something around a fintek LPC2ISA bride, and hooking that up to the LPC header of a PC-Engines APU2. That's a neat little fanless embedded x86_64 board (with schematics available). And as it has the LDRQ0# signal connected to the LPC header, so even ISA DMA should be possible.
I was thinking about doing something like a PCI card with 2 memory BARs: 1 memory BAR would translate all R/W into ISA I/O R/W 1 memory BAR would translate all R/W into ISA Memory R/W and maybe another space for a mailbox for interrupts, DMA, etc.
interesting idea. But indeed more a HDL/FPGA kind of task, rather than a board-level circuit design aroun existing ICs + software development kind of task. The latter of which seem to be falling more into both of our comfort zone..
I'm pondering to build something around a fintek LPC2ISA bride, and hooking that up to the LPC header of a PC-Engines APU2. That's a neat little fanless embedded x86_64 board (with schematics available). And as it has the LDRQ0# signal connected to the LPC header, so even ISA DMA should be possible.
Neat chip! I really don't want to have the ISA cards directly mapped into my system (because I want to connect VGA cards and such) and also because I want to map them into a VM of some sort. That's probably a bit different for your usecases :smile:
indeed more a HDL/FPGA kind of task
Yup. And iCE40 FPGAs are also totally unavailable right now, which isn't helping :/
Yup, I also have an FX3 USB3.0 board here to play around with.
In the end, USB is just the wrong protocol for this kind of application. Each bus transaction takes a very long fixed time due to USB frame lengths and this makes the result almost unusably slow.
A better interface like PCIe (or Thunderbolt), maybe Firewire would be required for proper operation.
I agree and it looks somone beat us to the punch. https://www.aliexpress.com/item/1005002622355949.html?spm=a2g0o.order_list.0.0.21ef1802t2BaDU Its a PCIE bus to ISA converter board. I think its more designed so you can interface embeded pcie things with leagcy electronics, but its 5v safe, LQFP-64 small, has a seperate spi and a few gpio independent pins with seperate 8 bit data/address lines. I ordered one of these and the CH368 Development board. The main diffrence is the 368 supports a 16 bit address space and a 32bit word data path with separate IOP and MEM access pins. Hell there are even signed windows 10 drivers for these things for both passthough and direct development.
Won't really know how well it works till I get it latter this month though. The chip maker has the drivers and a header for its dll and its simple enough to use. Funny enough it looks like this thing has been out since 2011 (At least that's the date on the header) so kind of surprised they never advertised it more.
As a side note, I also have evaluated the Arstech device, thinking I rather drop a pound to save a ton. Nope. ARG the rant I can go on that API when all it is just a FX2 directly connected to the ISA bus. It works though, but its stupid app is running 100% on one of the cpus and does cross process function direct pointer calls, shutter
@WarlockD The CH368 actually looks really promising! Have you found a dev board for the CH368 with an ISA connector directly attached?
Sadly no, I got both of them in. Intresting about them is they both have this 4 pin connector that has 8bits of address, 8bits of data and all the signal lines. So I could run a 4pin ribbon cable to say a backplane. The CH368 has a second 40 pin connector that has the other 24bit data, the upper 8bit address and singles for the spi/ extra gpio etc.
Right now trying to get a computer together for it and going to see if I can get my soundblaster to work on it. It only needs io to run. Also found some linux drivers for this to.
Real question is how to build something from this. It dosn't look like you need to use buffers like you would on the ISASTM, however since its a pcie bus, your limited to like a 2 foot usb 3.0 cord if your extending it that way. I think you could get a way with a 40 pin ide cable to an adaptor plate. Humm I will see if I can make such a plate, I wonder if they make cases that take two motherboards.
Catching up on this thread in 2023! Did you ever make progress with the CH368? I noticed this newer revision. Looks similar to the older CH368 but with an onboard FPGA:
Pcie Development Board CH368 Development Board Pcie-FPGA Development Board https://a.aliexpress.com/_mqNw0Bg
Does that hold some extra interest?
Not really, got pulled away by other things. I did mange to spider wire together the CH368 16bit board to a vga card and get it to run. The issue I couldn't get away from though is that I couldn't think of a way for it to emulate something a bios would recognize. This is an interface from PCIE to 16bit ISA, not the other way around so I cannot monitor things like address changes or such. Maybe as a connection to a CM4 raspberry pi (That's the pi that has a PCIE exposed) You could use a set of tri-state registers and monitor the isa bus, but I haven't scoped the connection to see if the chip can go fast enough to catch edges. But again the chip is cheap, requires little to no external components and the driver software is easy to use.
Honestly I have been looking at those dirt cheap 20k LUT Chinese FPGA's. Like under 20 bucks. That's more than enough for a complete NES and more than enough for any kind of video emulation. But again, things like this keep me moving around without focus so sorry I couldn't be much more help.