KloudKoder

@Yaffle I now see f64.fma under "Additional floating point operators". I'm willing to assume that it will be adopted as an instruction. And definitely I wouldn't demand the tightest interval,...

What if I write the Intel/AMD support for you? Would that offer you maintainers enough motivation to port it to other platforms and make it part of the spec? We...

@tlively I read your previous comment and I understand why new opcodes are a hard sell. In this case, that's particularly vexing because intervals have suffered this chicken-and-egg adoption problem...

@tlively I get that, but it's not accurate. nVidia has hardware interval primitives, in the sense of floating-point instructions with builtin rounding modes. They aren't accessible via WebAssembly. The Intel...

@tlively > Oh I see, I didn't realize this was already supported by Intel hardware. How widespread is the support? @penzn Is correct. This type of rounding support has been...

@penzn Yeah my wording wasn't good. I meant that you mentioned the control word architecture, which in my opinion is a terrible design. The bottom line is that a modest...

@penzn I can hardly think of a more relevant question for this thread. First of all, there are really 2 basic architecture choices: 1. Look like Intel. In other words,...

@penzn Thanks for the video. I watched the whole thing. What I mean by "self-modifying code" is in the relaxed sense of being to create WASM byte code from within...

@penzn The WASI site makes it really difficult to find what POSIX functions they emulate, but in any event, I think you're right that they don't have anything like fork()....

@penzn Thanks, that might be a sufficient generalization of this issue. Will comment further here when I understand better.