WIP: SPV_EXT_arithmetic_fence
This PR includes initial testing for the SPV_EXT_arithmetic_fence extension.
This test works by performing the calculation big + small - big, where big is a large floating-point number and small is a small floating-point number. Both the add and the subtract have the FPFastMathMode=Fast decoration, so absent any arithmetic fences, many implementations will reassociate this calculation to big - big + small, and further optimize it to just small.
The test puts an arithmetic fence around big + small, so the calculation is actually arithmetic_fence(big + small) - big. Since the arithmetic fence blocks reassociation, and there is not enough precision to represent big + small, with the artihmetic fence the calculation must produce 0. If any of the calculations produce a nonzero result, then the arithmetic fence is probably ignored, and the test fails.
There are separate test cases for fp32, fp64, and fp16 arithmetic fences, depending on the floating-point types supported by the device. Each test case tests the arithmetic fence on scalars and all supported vector sizes.
I'll keep this PR as a draft while we work out how to check whether the SPV_EXT_arithmetic_fence extension is supported.