PipelineC
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Add more support for built in multi port RAM functions
Current built in block/LUT RAM functionality does not support more than one read port. I.e. the supported dual port RAMs are one read port, one write port.
rd_val = the_ram_RAM_SP_RF_2(addr, write_data, write_enable);
The main blocker for this is that a RAM function with two read ports will need to return two values.
rd_val1, rd_val2 = the_ram_RAM_SP_RF_2(addr1, addr2, data1, data2, write_enable1, write_enable2);
Since this is C it needs to be a struct with two fields that is returned. This requires some code gen to implement as other features have done like clock crossings...
See https://github.com/JulianKemmerer/PipelineC/blob/master/ram.h for work around