Jonatan Antoni
Jonatan Antoni
Hi @MaxFlatline, Thanks for getting in touch. Could you please check if double (multiple) buffering [[1](https://en.wikipedia.org/wiki/Multiple_buffering)] can solve your issue? I.e., instead of asking for a "half buffer transfer" event,...
Hi @MaxFlatline, Well, thanks for adding the important bit that your hardware has hardware half-complete transfer detection. As this seems to be an optional hardware feature we'd need to check...
@christophe0606, how does this integrate with CMSIS-DSP?
Hi @higaski, Would you be able to contribute (at least a starting point) of what you would need for your project(s)? Thanks, Jonatan
@higaski, We are currently discussing restructuring CMSIS-Core, see #33. So far, we are thinking about folders per profile (M, A, and R). Perhaps having another folder (generic?) would already serve...
Sure, let's start with what you need. We can always add additional stuff later.
DWT got added to access cycle counter for example, which can be used as independent timer source for Event Recorder. BPU is considered to be relevant for debuggers, only. What...
Hi @GuangMing34, Sure, I think you are just the first one ever looking for these additional registers. Hence they got never added. Please feel free to contribute whatever you need...
Hi @GuangMing34, I have tagged @AlbertHuang-CPU who is our expert for Star-MC1 to review your contribution. Many thanks for raising this.
Hi @CanastraRF, thanks for raising this. Would you be able to provide the required changes as a pull-request to speed up things?