Ivan Velickovic
Ivan Velickovic
I believe that the RISC-V hypervisor extension is not yet implemented in Renode. I was just wondering if it's something the Renode developers plan to implement? Thanks!
### Zig Version 0.12.0-dev.152+411462e1c ### Steps to Reproduce and Observed Behavior Create a file called `embed_file.S` with this contents: ``` .section .embedded_file, "aw", @progbits .global _embedded_file, _embedded_file_end _embedded_file: .incbin EMBEDDED_FILE_PATH...
A while ago I tried to get the RPi4 into the seL4 CI due to how fragile the platform is. After some fixes/work I thought it was ready to go...
Only results in a compilation error on newer GCC versions. What confuses me though is this only happens for me in sel4bench, but not sel4test. I believe I'm using the...
The motivation for using a binary image is that it is (in my experience) the most stable.
I am trying to understand some of the code for the ELF loader on RISC-V. I've come across an autogenerated define called `IMAGE_START_ADDR`. On the Spike platform for example (looking...
The mapping tutorial (https://docs.sel4.systems/Tutorials/mapping.html) refers to levels of paging objects that no longer exist due to RFC-10 (https://sel4.atlassian.net/jira/software/c/projects/RFC/issues/RFC-10) and hence should be updated.
There are not really (to my knowledge) any tests for vCPUs. We should, at least, add basic tests for all of the libsel4 API for vCPU objects.
Closing https://github.com/seL4/sel4test/issues/98.
This patch adds a simple test to ensure that the instructions for cache maintenance from user-space succeed (when the kernel is configured to allow it). It does not test that...