dpctl

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The core part of functionality to add any elementwise function is quite similar between dpnp and dpctl. In scope of [gh-1868](https://github.com/IntelPython/dpnp/pull/1868) I proposed changes to dpnp code to add the...

antonwolfy

The below example reproduces an issue with passing negative shape to the setter: ```python import numpy, dpctl, dpctl.tensor as dpt dpctl.__version__ Out: '0.18.0dev0+21.g60fc3eb9d0' a = dpt.ones(4) a.shape = [-1] ---------------------------------------------------------------------------...

antonwolfy

`cumulative_logsumexp` raises Runtime warning `loop not vectorized` while running on CPU device

1

The below warning is raised from `cumulative_logsumexp` call during the first launch on CPU device: ```python import dpctl, dpctl.tensor as dpt dpctl.__version__ # Out: '0.17.0dev0+331.g1243edc8f5' a = dpt.ones(10, device='cpu') dpt.cumulative_logsumexp(a)...

antonwolfy

Dedicated code to copy array to C-contig/F-contig destinations

6

This PR adds specialized kernels to copy `usm_ndarray` to C-/F-contiguous destinations of the same shape and the same dtype. It also adds dedicated kernels to copy batches of square matrices...

oleksandr-pavlyk

``` reading sources... [100%] user_guides/index /home/opavlyk/mamba/envs/b_dpctl_docs/lib/python3.12/site-packages/dpctl/tensor/_utility_functions.py:docstring of dpctl.tensor._utility_functions.diff:28: ERROR: Unexpected indentation. ```

oleksandr-pavlyk

Update the documentation for building Pybind11 SYCL Backend with CUDA

2

Hi, I'm trying to build the pybind11 extension mentioned under onemkl_gemv example DPCTL build with CUDA: https://github.com/IntelPython/dpctl/tree/master/examples/pybind11/onemkl_gemv Example mentioned fails to run all test cases: The build works with the...

sreerajkksd

Add support for raw_kernel_arg extension

1

Add support for the DPC++ SYCL extension `raw_kernel_arg` that allows to pass a binary blob as kernel arguments. This is for example useful if the kernel uses a `struct` as...

sommerlukas

Update integer advanced indexing for array API 2024.12 spec

7

The array API specification now requires advanced integer indexing (i.e., with arrays) to promote Python integer scalars to arrays when mixed with integer arrays. This PR implements this behavior, promoting...

ndgrigorian

Since `ZE_FLAT_DEVICE_HIERARCHY` and `ZE_AFFINITY_MASK` direct impacts the (now-supported) composite devices, it should be mentioned in https://intelpython.github.io/dpctl/latest/user_guides/environment_variables.html see: https://www.intel.com/content/www/us/en/developer/articles/technical/flattening-gpu-tile-hierarchy.html

ndgrigorian

Both user's guide and beginner's guide have sections on devices. Composite devices should be covered here. Can look to guides like https://www.intel.com/content/www/us/en/developer/articles/technical/flattening-gpu-tile-hierarchy.html https://www.intel.com/content/www/us/en/docs/oneapi/optimization-guide-gpu/2025-0/multi-gpu-and-multi-stack-architecture-and.html and the compiler itself https://github.com/intel/llvm/blob/71ca51fb52ccf0bd8f03d33cf9ea2962cf254a7f/sycl/doc/MultiTileCardWithLevelZero.md https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/experimental/sycl_ext_oneapi_composite_device.asciidoc

ndgrigorian