Implement method of splitting substrate into local islands (using `DigiSub`)

[hpretl]

In a typical IC design, different VSS nets are used in different areas for blocks requiring isolation (e.g., digital blocks vs. analog blocks), leading to p-taps shorting these VSS nets via the (common) substrate node if no measures are taken.

A common method is to split the substrate into local VSS islands using a marking layer to circumvent these problems.

In SG13G2 this marking layer is called DigiSub. Please support this layer in LVS and PEX.

[sergeiandreyev]

Hello @hpretl , could you please confirm that with the latest LVS update this enhancement is implemented?

[hpretl]

Hi @sergeiandreyev I can check, but this will take quite a while.