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Major bug/problem in the a22oi_1 standard cell

Open sergeiandreyev opened this issue 1 year ago • 2 comments

⚠️ IMPORTANT There is functional inconsistency between physical design/transistor-level schematic and Liberty/Verilog description of the a22oi_1 cell, if the cell is used in the design this will lead to a chip not functioning as expected. Other cells could be affected as well.. Thanks to ETH Zurich team that found this critical issue!

sergeiandreyev avatar Feb 06 '24 11:02 sergeiandreyev

Added dont_use attributes to Liberty description of a22oi_1 cell as a temporary workaround (https://github.com/IHP-GmbH/IHP-Open-PDK/commit/4fdc719503662cdd21793dcc3a1506a057c5d461)

sergeiandreyev avatar Feb 06 '24 11:02 sergeiandreyev

a22oi_1 cell function was fixed in Liberty and Verilog views

sergeiandreyev avatar Feb 20 '24 14:02 sergeiandreyev