Adding GIC v2 interrupt group handling to GCC_AARCH64 port.

[sfarnswo]

Description

re: https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/316#issuecomment-2327254371
Adding handling for GIC V2 interrupt grouping and security extension. Additional handling determines which interrupt group is asserted by inspecting HPPIR. Based on the interrupt group IAR/EOIR or AIAR/AEOIR registers are used to acknowledge and end interrupts.

Test Steps

Test target used = STM32MP357F-EV1.

Manually verified interrupt acknowledgement, routing, and ending for group 0 and group 1 interrupts by utilizing the ARMV8-A physical timer interrupt and varying the security routing of the interrupt.

Checklist:

• [x] I have tested my changes. No regression in existing tests.
• [ ] I have modified and/or added unit-tests to cover the code changes in this Pull Request.

Related Issue

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[sonarqubecloud[bot]]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarCloud